X-Git-Url: https://sigrok.org/gitweb/?p=pulseview.git;a=blobdiff_plain;f=pv%2Fdata%2Flogicsegment.cpp;h=a5634b30e5d6f93fd0495ae26e9e56dc5325e716;hp=3e18b85ef4143bb399c5dd1dcff2fb7e6375d7ed;hb=c28fa62bc89656ba3b1b01011a45e941d6c7d42a;hpb=2ad82c2e40b6865481733913a2c32735602f63c4;ds=sidebyside

diff --git a/pv/data/logicsegment.cpp b/pv/data/logicsegment.cpp
index 3e18b85e..a5634b30 100644
--- a/pv/data/logicsegment.cpp
+++ b/pv/data/logicsegment.cpp
@@ -308,7 +308,7 @@ void LogicSegment::get_subsampled_edges(
 				pow2_ceil(index, MipMapScalePower));
 
 			for (; index < final_index &&
-					(index & ~(~0 << MipMapScalePower)) != 0;
+					(index & ~((uint64_t)(~0) << MipMapScalePower)) != 0;
 					index++) {
 				const bool sample =
 					(get_sample(index) & sig_mask) != 0;
@@ -358,7 +358,7 @@ void LogicSegment::get_subsampled_edges(
 						sig_mask))
 					break;
 
-				if ((offset & ~(~0 << MipMapScalePower)) == 0) {
+				if ((offset & ~((uint64_t)(~0) << MipMapScalePower)) == 0) {
 					// If we are now at the beginning of a
 					// higher level mip-map block ascend one
 					// level