LogicSegment: Limit end in get_subsampled_edges() if needed

[pulseview.git] / pv / data / logicsegment.cpp

diff --git a/pv/data/logicsegment.cpp b/pv/data/logicsegment.cpp
index 61382e6f0212a5e2591fe5863bebb2fe3dd87b14..62f188e383d4dff662874dce86d975f0ecbdf3a9 100644 (file)
--- a/pv/data/logicsegment.cpp
+++ b/pv/data/logicsegment.cpp
@@ -19,10 +19,10 @@
 
 #include <extdef.h>
 
-#include <assert.h>
-#include <string.h>
-#include <stdlib.h>
+#include <cassert>
 #include <cmath>
+#include <cstdlib>
+#include <cstring>
 
 #include "logic.hpp"
 #include "logicsegment.hpp"
@@ -33,8 +33,8 @@ using std::lock_guard;
 using std::recursive_mutex;
 using std::max;
 using std::min;
-using std::pair;
 using std::shared_ptr;
+using std::vector;
 
 using sigrok::Logic;
 
@@ -44,17 +44,15 @@ namespace data {
 const int LogicSegment::MipMapScalePower = 4;
 const int LogicSegment::MipMapScaleFactor = 1 << MipMapScalePower;
 const float LogicSegment::LogMipMapScaleFactor = logf(MipMapScaleFactor);
-const uint64_t LogicSegment::MipMapDataUnit = 64*1024; // bytes
+const uint64_t LogicSegment::MipMapDataUnit = 64 * 1024; // bytes
 
-LogicSegment::LogicSegment(pv::data::Logic& owner, shared_ptr<sigrok::Logic> data,
+LogicSegment::LogicSegment(pv::data::Logic& owner, unsigned int unit_size,
        uint64_t samplerate) :
-       Segment(samplerate, data->unit_size()),
+       Segment(samplerate, unit_size),
        owner_(owner),
        last_append_sample_(0)
 {
-       lock_guard<recursive_mutex> lock(mutex_);
        memset(mip_map_, 0, sizeof(mip_map_));
-       append_payload(data);
 }
 
 LogicSegment::~LogicSegment()
@@ -143,12 +141,19 @@ void LogicSegment::append_payload(shared_ptr<sigrok::Logic> logic)
        assert(unit_size_ == logic->unit_size());
        assert((logic->data_length() % unit_size_) == 0);
 
+       append_payload(logic->data_pointer(), logic->data_length());
+}
+
+void LogicSegment::append_payload(void *data, uint64_t data_size)
+{
+       assert((data_size % unit_size_) == 0);
+
        lock_guard<recursive_mutex> lock(mutex_);
 
        uint64_t prev_sample_count = sample_count_;
-       uint64_t sample_count = logic->data_length() / unit_size_;
+       uint64_t sample_count = data_size / unit_size_;
 
-       append_samples(logic->data_pointer(), sample_count);
+       append_samples(data, sample_count);
 
        // Generate the first mip-map from the data
        append_payload_to_mipmap();
@@ -161,18 +166,19 @@ void LogicSegment::append_payload(shared_ptr<sigrok::Logic> logic)
                        prev_sample_count + 1);
 }
 
-const uint8_t* LogicSegment::get_samples(int64_t start_sample,
-       int64_t end_sample) const
+void LogicSegment::get_samples(int64_t start_sample,
+       int64_t end_sample,     uint8_t* dest) const
 {
        assert(start_sample >= 0);
        assert(start_sample <= (int64_t)sample_count_);
        assert(end_sample >= 0);
        assert(end_sample <= (int64_t)sample_count_);
        assert(start_sample <= end_sample);
+       assert(dest != nullptr);
 
        lock_guard<recursive_mutex> lock(mutex_);
 
-       return get_raw_samples(start_sample, (end_sample-start_sample));
+       get_raw_samples(start_sample, (end_sample - start_sample), dest);
 }
 
 SegmentLogicDataIterator* LogicSegment::begin_sample_iteration(uint64_t start)
@@ -252,7 +258,7 @@ void LogicSegment::append_payload_to_mipmap()
        // Compute higher level mipmaps
        for (unsigned int level = 1; level < ScaleStepCount; level++) {
                MipMapLevel &m = mip_map_[level];
-               const MipMapLevel &ml = mip_map_[level-1];
+               const MipMapLevel &ml = mip_map_[level - 1];
 
                // Expand the data buffer to fit the new samples
                prev_length = m.length;
@@ -290,7 +296,8 @@ uint64_t LogicSegment::get_unpacked_sample(uint64_t index) const
 {
        assert(index < sample_count_);
 
-       const uint8_t* data = get_raw_samples(index, 1);
+       uint8_t* data = new uint8_t[unit_size_];
+       get_raw_samples(index, 1, data);
        uint64_t sample = unpack_sample(data);
        delete[] data;
 
@@ -298,7 +305,7 @@ uint64_t LogicSegment::get_unpacked_sample(uint64_t index) const
 }
 
 void LogicSegment::get_subsampled_edges(
-       std::vector<EdgePair> &edges,
+       vector<EdgePair> &edges,
        uint64_t start, uint64_t end,
        float min_length, int sig_index)
 {
@@ -307,7 +314,6 @@ void LogicSegment::get_subsampled_edges(
        bool last_sample;
        bool fast_forward;
 
-       assert(end <= get_sample_count());
        assert(start <= end);
        assert(min_length > 0);
        assert(sig_index >= 0);
@@ -315,6 +321,10 @@ void LogicSegment::get_subsampled_edges(
 
        lock_guard<recursive_mutex> lock(mutex_);
 
+       // Make sure we only process as many samples as we have
+       if (end > get_sample_count())
+               end = get_sample_count();
+
        const uint64_t block_length = (uint64_t)max(min_length, 1.0f);
        const unsigned int min_level = max((int)floorf(logf(min_length) /
                LogMipMapScaleFactor) - 1, 0);
@@ -322,7 +332,7 @@ void LogicSegment::get_subsampled_edges(
 
        // Store the initial state
        last_sample = (get_unpacked_sample(start) & sig_mask) != 0;
-       edges.push_back(pair<int64_t, bool>(index++, last_sample));
+       edges.emplace_back(index++, last_sample);
 
        while (index + block_length <= end) {
                //----- Continue to search -----//
@@ -376,7 +386,7 @@ void LogicSegment::get_subsampled_edges(
 
                        // Slide right and zoom out at the beginnings of mip-map
                        // blocks until we encounter a change
-                       while (1) {
+                       while (true) {
                                const int level_scale_power =
                                        (level + 1) * MipMapScalePower;
                                const uint64_t offset =
@@ -408,7 +418,7 @@ void LogicSegment::get_subsampled_edges(
 
                        // Zoom in, and slide right until we encounter a change,
                        // and repeat until we reach min_level
-                       while (1) {
+                       while (true) {
                                assert(mip_map_[level].data);
 
                                const int level_scale_power =
@@ -458,7 +468,7 @@ void LogicSegment::get_subsampled_edges(
                // Store the final state
                const bool final_sample =
                        (get_unpacked_sample(final_index - 1) & sig_mask) != 0;
-               edges.push_back(pair<int64_t, bool>(index, final_sample));
+               edges.emplace_back(index, final_sample);
 
                index = final_index;
                last_sample = final_sample;
@@ -467,8 +477,8 @@ void LogicSegment::get_subsampled_edges(
        // Add the final state
        const bool end_sample = get_unpacked_sample(end) & sig_mask;
        if (last_sample != end_sample)
-               edges.push_back(pair<int64_t, bool>(end, end_sample));
-       edges.push_back(pair<int64_t, bool>(end + 1, end_sample));
+               edges.emplace_back(end, end_sample);
+       edges.emplace_back(end + 1, end_sample);
 }
 
 uint64_t LogicSegment::get_subsample(int level, uint64_t offset) const