From 2fcd7c22852436c3226de9007e88cb305cce1b00 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Wed, 11 Jul 2012 22:19:31 +0200 Subject: [PATCH] srd: Performance improvements for various PDs. Ignore/skip identical samples in most (low-level) PDs, as we're usually (but not necessarily always) only interested in pin changes. This yields a significant performance improvement for the PDs. The mechanism was already used in the 'i2s', 'jtag', and 'lpc' PDs, but not yet in all supported low-level decoders. The following PDs now also use this mechanism: 'dcf77', 'i2c', 'spi', 'uart', and 'usb_signalling'. Thanks Lars-Peter Clausen for bringing this to our attention. --- decoders/dcf77/dcf77.py | 8 +++++++- decoders/i2c/i2c.py | 8 +++++++- decoders/spi/spi.py | 8 +++++++- decoders/uart/uart.py | 8 +++++++- decoders/usb_signalling/usb_signalling.py | 8 +++++++- 5 files changed, 35 insertions(+), 5 deletions(-) diff --git a/decoders/dcf77/dcf77.py b/decoders/dcf77/dcf77.py index 4da9bc4..c4132e9 100644 --- a/decoders/dcf77/dcf77.py +++ b/decoders/dcf77/dcf77.py @@ -50,6 +50,7 @@ class Decoder(srd.Decoder): def __init__(self, **kwargs): self.state = 'WAIT FOR RISING EDGE' + self.oldpins = None self.oldval = None self.oldpon = None self.samplenum = 0 @@ -197,7 +198,12 @@ class Decoder(srd.Decoder): raise Exception('Invalid DCF77 bit: %d' % c) def decode(self, ss, es, data): - for (self.samplenum, (val, pon)) in data: + for (self.samplenum, pins) in data: + + # Ignore identical samples early on (for performance reasons). + if self.oldpins == pins: + continue + self.oldpins, (val, pon) = pins, pins # Always remember the old PON state. if self.oldpon != pon: diff --git a/decoders/i2c/i2c.py b/decoders/i2c/i2c.py index 0e79497..53321eb 100644 --- a/decoders/i2c/i2c.py +++ b/decoders/i2c/i2c.py @@ -88,6 +88,7 @@ class Decoder(srd.Decoder): self.state = 'FIND START' self.oldscl = None self.oldsda = None + self.oldpins = None def start(self, metadata): self.out_proto = self.add(srd.OUTPUT_PROTO, 'i2c') @@ -198,7 +199,12 @@ class Decoder(srd.Decoder): super(Decoder, self).put(self.startsample, self.samplenum, output_id, data) def decode(self, ss, es, data): - for (self.samplenum, (scl, sda)) in data: + for (self.samplenum, pins) in data: + + # Ignore identical samples early on (for performance reasons). + if self.oldpins == pins: + continue + self.oldpins, (scl, sda) = pins, pins # First sample: Save SCL/SDA value. if self.oldscl == None: diff --git a/decoders/spi/spi.py b/decoders/spi/spi.py index 2f10ef4..1085786 100644 --- a/decoders/spi/spi.py +++ b/decoders/spi/spi.py @@ -74,6 +74,7 @@ class Decoder(srd.Decoder): self.samplenum = -1 self.cs_was_deasserted_during_data_word = 0 self.oldcs = -1 + self.oldpins = None def start(self, metadata): self.out_proto = self.add(srd.OUTPUT_PROTO, 'spi') @@ -84,7 +85,12 @@ class Decoder(srd.Decoder): def decode(self, ss, es, data): # TODO: Either MISO or MOSI could be optional. CS# is optional. - for (self.samplenum, (miso, mosi, sck, cs)) in data: + for (self.samplenum, pins) in data: + + # Ignore identical samples early on (for performance reasons). + if self.oldpins == pins: + continue + self.oldpins, (miso, mosi, sck, cs) = pins, pins if self.oldcs != cs: # Send all CS# pin value changes. diff --git a/decoders/uart/uart.py b/decoders/uart/uart.py index bb4d9e6..92c105c 100644 --- a/decoders/uart/uart.py +++ b/decoders/uart/uart.py @@ -103,6 +103,7 @@ class Decoder(srd.Decoder): self.startsample = [-1, -1] self.state = ['WAIT FOR START BIT', 'WAIT FOR START BIT'] self.oldbit = [None, None] + self.oldpins = None def start(self, metadata): self.samplerate = metadata['samplerate'] @@ -265,7 +266,12 @@ class Decoder(srd.Decoder): def decode(self, ss, es, data): # TODO: Either RX or TX could be omitted (optional probe). - for (self.samplenum, (rx, tx)) in data: + for (self.samplenum, pins) in data: + + # Ignore identical samples early on (for performance reasons). + if self.oldpins == pins: + continue + self.oldpins, (rx, tx) = pins, pins # First sample: Save RX/TX value. if self.oldbit[RX] == None: diff --git a/decoders/usb_signalling/usb_signalling.py b/decoders/usb_signalling/usb_signalling.py index 512703d..3272cbf 100644 --- a/decoders/usb_signalling/usb_signalling.py +++ b/decoders/usb_signalling/usb_signalling.py @@ -67,6 +67,7 @@ class Decoder(srd.Decoder): self.scount = 0 self.packet = '' self.syms = [] + self.oldpins = None def start(self, metadata): self.samplerate = metadata['samplerate'] @@ -77,13 +78,18 @@ class Decoder(srd.Decoder): pass def decode(self, ss, es, data): - for (self.samplenum, (dp, dm)) in data: + for (self.samplenum, pins) in data: # Note: self.samplenum is the absolute sample number, whereas # self.scount only counts the number of samples since the # last change in the D+/D- lines. self.scount += 1 + # Ignore identical samples early on (for performance reasons). + if self.oldpins == pins: + continue + self.oldpins, (dp, dm) = pins, pins + if self.options['signalling'] == 'low-speed': sym = symbols_ls[dp, dm] elif self.options['signalling'] == 'full-speed': -- 2.30.2