From: Uwe Hermann Date: Mon, 13 Oct 2014 15:05:07 +0000 (+0200) Subject: All PDs: More consistent names for ss/es variables. X-Git-Tag: libsigrokdecode-0.4.0~157 X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=commitdiff_plain;h=486b19ce017c6663be6574dacd0c823304903bca All PDs: More consistent names for ss/es variables. Use self.ss/self.es, or if there's a need to differentiate them a bit more, use self.ss_/self.es_ consistently. Also, drop some unused variables. --- diff --git a/decoders/avr_isp/pd.py b/decoders/avr_isp/pd.py index 3a7c868..0914b5b 100644 --- a/decoders/avr_isp/pd.py +++ b/decoders/avr_isp/pd.py @@ -54,15 +54,15 @@ class Decoder(srd.Decoder): def __init__(self, **kwargs): self.state = 'IDLE' self.mosi_bytes, self.miso_bytes = [], [] - self.cmd_ss, self.cmd_es = 0, 0 + self.ss_cmd, self.es_cmd = 0, 0 self.xx, self.yy, self.zz, self.mm = 0, 0, 0, 0 - self.device_ss = None + self.ss_device = None def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): - self.put(self.cmd_ss, self.cmd_es, self.out_ann, data) + self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def handle_cmd_programming_enable(self, cmd, ret): # Programming enable. @@ -99,7 +99,7 @@ class Decoder(srd.Decoder): # Store for later. self.mm = cmd[3] - self.device_ss = self.cmd_ss + self.ss_device = self.ss_cmd # Sanity check on reply. if ret[1] != 0x30 or ret[2] != cmd[1] or ret[0] != self.yy: @@ -112,7 +112,7 @@ class Decoder(srd.Decoder): p = part[(self.part_fam_flash_size, self.part_number)] data = [9, ['Device: Atmel %s' % p]] - self.put(self.device_ss, self.cmd_es, self.out_ann, data) + self.put(self.ss_device, self.es_cmd, self.out_ann, data) # Sanity check on reply. if ret[1] != 0x30 or ret[2] != self.xx or ret[0] != self.mm: @@ -192,7 +192,7 @@ class Decoder(srd.Decoder): self.ss, self.es = ss, es if len(self.mosi_bytes) == 0: - self.cmd_ss = ss + self.ss_cmd = ss # Append new bytes. self.mosi_bytes.append(mosi) @@ -202,7 +202,7 @@ class Decoder(srd.Decoder): if len(self.mosi_bytes) < 4: return - self.cmd_es = es + self.es_cmd = es self.handle_command(self.mosi_bytes, self.miso_bytes) diff --git a/decoders/ds1307/pd.py b/decoders/ds1307/pd.py index 800f7a0..b784b6d 100644 --- a/decoders/ds1307/pd.py +++ b/decoders/ds1307/pd.py @@ -184,7 +184,7 @@ class Decoder(srd.Decoder): d = '%s, %02d.%02d.%4d %02d:%02d:%02d' % ( days_of_week[self.days - 1], self.date, self.months, self.years, self.hours, self.minutes, self.seconds) - self.put(self.block_start_sample, self.es, self.out_ann, + self.put(self.ss_block, self.es, self.out_ann, [cls, ['%s date/time: %s' % (rw, d)]]) def handle_reg(self, b): @@ -200,7 +200,7 @@ class Decoder(srd.Decoder): def is_correct_chip(self, addr): if addr == DS1307_I2C_ADDRESS: return True - self.put(self.block_start_sample, self.es, self.out_ann, + self.put(self.ss_block, self.es, self.out_ann, [28, ['Ignoring non-DS1307 data (slave 0x%02X)' % addr]]) return False @@ -222,7 +222,7 @@ class Decoder(srd.Decoder): if cmd != 'START': return self.state = 'GET SLAVE ADDR' - self.block_start_sample = ss + self.ss_block = ss elif self.state == 'GET SLAVE ADDR': # Wait for an address write operation. if cmd != 'ADDRESS WRITE': diff --git a/decoders/i2c/pd.py b/decoders/i2c/pd.py index 0408c7d..ce0d699 100644 --- a/decoders/i2c/pd.py +++ b/decoders/i2c/pd.py @@ -110,7 +110,7 @@ class Decoder(srd.Decoder): def __init__(self, **kwargs): self.samplerate = None - self.ss = self.es = self.byte_ss = -1 + self.ss = self.es = self.ss_byte = -1 self.samplenum = None self.bitcount = 0 self.databyte = 0 @@ -182,7 +182,7 @@ class Decoder(srd.Decoder): # Remember the start of the first data/address bit. if self.bitcount == 0: - self.byte_ss = self.samplenum + self.ss_byte = self.samplenum # Store individual bits and their start/end samplenumbers. # In the list, index 0 represents the LSB (I²C transmits MSB-first). @@ -219,7 +219,7 @@ class Decoder(srd.Decoder): cmd = 'DATA READ' bin_class = 2 - self.ss, self.es = self.byte_ss, self.samplenum + self.bitwidth + self.ss, self.es = self.ss_byte, self.samplenum + self.bitwidth self.putp(['BITS', self.bits]) self.putp([cmd, d]) @@ -233,7 +233,7 @@ class Decoder(srd.Decoder): self.ss, self.es = self.samplenum, self.samplenum + self.bitwidth w = ['Write', 'Wr', 'W'] if self.wr else ['Read', 'Rd', 'R'] self.putx([proto[cmd][0], w]) - self.ss, self.es = self.byte_ss, self.samplenum + self.ss, self.es = self.ss_byte, self.samplenum self.putx([proto[cmd][0], ['%s: %02X' % (proto[cmd][1], d), '%s: %02X' % (proto[cmd][2], d), '%02X' % d]]) @@ -256,7 +256,7 @@ class Decoder(srd.Decoder): # Meta bitrate elapsed = 1 / float(self.samplerate) * (self.samplenum - self.pdu_start + 1) bitrate = int(1 / elapsed * self.pdu_bits) - self.put(self.byte_ss, self.samplenum, self.out_bitrate, bitrate) + self.put(self.ss_byte, self.samplenum, self.out_bitrate, bitrate) cmd = 'STOP' self.ss, self.es = self.samplenum, self.samplenum diff --git a/decoders/i2s/pd.py b/decoders/i2s/pd.py index 8b45a75..ee642d7 100644 --- a/decoders/i2s/pd.py +++ b/decoders/i2s/pd.py @@ -67,7 +67,7 @@ class Decoder(srd.Decoder): self.data = 0 self.samplesreceived = 0 self.first_sample = None - self.start_sample = None + self.ss_block = None self.wordlength = -1 self.wrote_wav_header = False @@ -81,23 +81,23 @@ class Decoder(srd.Decoder): self.samplerate = value def putpb(self, data): - self.put(self.start_sample, self.samplenum, self.out_python, data) + self.put(self.ss_block, self.samplenum, self.out_python, data) def putbin(self, data): - self.put(self.start_sample, self.samplenum, self.out_bin, data) + self.put(self.ss_block, self.samplenum, self.out_bin, data) def putb(self, data): - self.put(self.start_sample, self.samplenum, self.out_ann, data) + self.put(self.ss_block, self.samplenum, self.out_ann, data) def report(self): # Calculate the sample rate. samplerate = '?' - if self.start_sample is not None and \ + if self.ss_block is not None and \ self.first_sample is not None and \ - self.start_sample > self.first_sample: + self.ss_block > self.first_sample: samplerate = '%d' % (self.samplesreceived * - self.samplerate / (self.start_sample - + self.samplerate / (self.ss_block - self.first_sample)) return 'I²S: %d %d-bit samples received at %sHz' % \ @@ -151,7 +151,7 @@ class Decoder(srd.Decoder): continue # Only submit the sample, if we received the beginning of it. - if self.start_sample is not None: + if self.ss_block is not None: if not self.wrote_wav_header: self.put(0, 0, self.out_bin, (0, self.wav_header())) @@ -179,7 +179,7 @@ class Decoder(srd.Decoder): # Reset decoder state. self.data = 0 self.bitcount = 0 - self.start_sample = self.samplenum + self.ss_block = self.samplenum # Save the first sample position. if self.first_sample is None: diff --git a/decoders/ir_rc5/pd.py b/decoders/ir_rc5/pd.py index 4926cb6..e1dd42f 100644 --- a/decoders/ir_rc5/pd.py +++ b/decoders/ir_rc5/pd.py @@ -59,7 +59,7 @@ class Decoder(srd.Decoder): def __init__(self, **kwargs): self.samplerate = None self.samplenum = None - self.edges, self.bits, self.bits_ss_es = [], [], [] + self.edges, self.bits, self.ss_es_bits = [], [], [] self.state = 'IDLE' def start(self): @@ -73,7 +73,7 @@ class Decoder(srd.Decoder): self.halfbit = int((self.samplerate * 0.00178) / 2.0) def putb(self, bit1, bit2, data): - ss, es = self.bits_ss_es[bit1][0], self.bits_ss_es[bit2][1] + ss, es = self.ss_es_bits[bit1][0], self.ss_es_bits[bit2][1] self.put(ss, es, self.out_ann, data) def handle_bits(self): @@ -83,9 +83,9 @@ class Decoder(srd.Decoder): if i == 0: ss = max(0, self.bits[0][0] - self.halfbit) else: - ss = self.bits_ss_es[i - 1][1] + ss = self.ss_es_bits[i - 1][1] es = self.bits[i][0] + self.halfbit - self.bits_ss_es.append([ss, es]) + self.ss_es_bits.append([ss, es]) self.putb(i, i, [0, ['%d' % self.bits[i][1]]]) # Bits[0:0]: Startbit 1 s = ['Startbit1: %d' % b[0][1], 'SB1: %d' % b[0][1], 'SB1', 'S1', 'S'] @@ -132,7 +132,7 @@ class Decoder(srd.Decoder): return 'e' # Error, invalid edge distance. def reset_decoder_state(self): - self.edges, self.bits, self.bits_ss_es = [], [], [] + self.edges, self.bits, self.ss_es_bits = [], [], [] self.state = 'IDLE' def decode(self, ss, es, data): diff --git a/decoders/lm75/pd.py b/decoders/lm75/pd.py index 9483940..6b2bfa8 100644 --- a/decoders/lm75/pd.py +++ b/decoders/lm75/pd.py @@ -76,7 +76,7 @@ class Decoder(srd.Decoder): def putb(self, data): # Helper for annotations which span a block of I²C packets. - self.put(self.block_start, self.block_end, self.out_ann, data) + self.put(self.ss_block, self.es_block, self.out_ann, data) def warn_upon_invalid_slave(self, addr): # LM75 and compatible devices have a 7-bit I²C slave address where @@ -102,11 +102,11 @@ class Decoder(srd.Decoder): def handle_temperature_reg(self, b, s, rw): # Common helper for the temperature/T_HYST/T_OS registers. if len(self.databytes) == 0: - self.block_start = self.ss + self.ss_block = self.ss self.databytes.append(b) return self.databytes.append(b) - self.block_end = self.es + self.es_block = self.es self.output_temperature(s, rw) self.databytes = [] diff --git a/decoders/mx25lxx05d/pd.py b/decoders/mx25lxx05d/pd.py index 2222c37..9639386 100644 --- a/decoders/mx25lxx05d/pd.py +++ b/decoders/mx25lxx05d/pd.py @@ -126,7 +126,7 @@ class Decoder(srd.Decoder): def handle_rdid(self, mosi, miso): if self.cmdstate == 1: # Byte 1: Master sends command ID. - self.start_sample = self.ss + self.ss_block = self.ss self.putx([2, ['Command: %s' % cmds[self.state][1]]]) elif self.cmdstate == 2: # Byte 2: Slave sends the JEDEC manufacturer ID. @@ -143,7 +143,7 @@ class Decoder(srd.Decoder): # TODO: Check self.device_id is valid & exists in device_names. # TODO: Same device ID? Check! d = 'Device: Macronix %s' % device_name[self.device_id] - self.put(self.start_sample, self.es, self.out_ann, [0, [d]]) + self.put(self.ss_block, self.es, self.out_ann, [0, [d]]) self.state = None else: self.cmdstate += 1 @@ -215,7 +215,7 @@ class Decoder(srd.Decoder): if self.cmdstate == 1: # Byte 1: Master sends command ID. self.addr = 0 - self.start_sample = self.ss + self.ss_block = self.ss self.putx([8, ['Command: %s' % cmds[self.state][1]]]) elif self.cmdstate in (2, 3, 4): # Bytes 2/3/4: Master sends sectror address (24bits, MSB-first). @@ -225,12 +225,12 @@ class Decoder(srd.Decoder): if self.cmdstate == 4: d = 'Erase sector %d (0x%06x)' % (self.addr, self.addr) - self.put(self.start_sample, self.es, self.out_ann, [24, [d]]) + self.put(self.ss_block, self.es, self.out_ann, [24, [d]]) # TODO: Max. size depends on chip, check that too if possible. if self.addr % 4096 != 0: # Sector addresses must be 4K-aligned (same for all 3 chips). d = 'Warning: Invalid sector address!' - self.put(self.start_sample, self.es, self.out_ann, [101, [d]]) + self.put(self.ss_block, self.es, self.out_ann, [101, [d]]) self.state = None else: self.cmdstate += 1 @@ -288,7 +288,7 @@ class Decoder(srd.Decoder): def handle_rems(self, mosi, miso): if self.cmdstate == 1: # Byte 1: Master sends command ID. - self.start_sample = self.ss + self.ss_block = self.ss self.putx([16, ['Command: %s' % cmds[self.state][1]]]) elif self.cmdstate in (2, 3): # Bytes 2/3: Master sends two dummy bytes. @@ -313,7 +313,6 @@ class Decoder(srd.Decoder): self.putx([24, ['%s ID' % d]]) if self.cmdstate == 6: - self.end_sample = self.es id = self.ids[1] if self.manufacturer_id_first else self.ids[0] self.putx([24, ['Device: Macronix %s' % device_name[id]]]) self.state = None diff --git a/decoders/mxc6225xu/pd.py b/decoders/mxc6225xu/pd.py index 2f09488..8b3dcc9 100644 --- a/decoders/mxc6225xu/pd.py +++ b/decoders/mxc6225xu/pd.py @@ -165,7 +165,6 @@ class Decoder(srd.Decoder): if cmd != 'START': return self.state = 'GET SLAVE ADDR' - self.block_start_sample = ss elif self.state == 'GET SLAVE ADDR': # Wait for an address write operation. # TODO: We should only handle packets to the slave(?) diff --git a/decoders/nunchuk/pd.py b/decoders/nunchuk/pd.py index ef3d267..afcf1de 100644 --- a/decoders/nunchuk/pd.py +++ b/decoders/nunchuk/pd.py @@ -52,7 +52,7 @@ class Decoder(srd.Decoder): self.sx = self.sy = self.ax = self.ay = self.az = self.bz = self.bc = -1 self.databytecount = 0 self.reg = 0x00 - self.ss = self.es = self.block_ss = self.block_es = 0 + self.ss = self.es = self.ss_block = self.es_block = 0 self.init_seq = [] def start(self): @@ -62,13 +62,13 @@ class Decoder(srd.Decoder): self.put(self.ss, self.es, self.out_ann, data) def putb(self, data): - self.put(self.block_ss, self.block_es, self.out_ann, data) + self.put(self.ss_block, self.es_block, self.out_ann, data) def putd(self, bit1, bit2, data): self.put(self.bits[bit1][1], self.bits[bit2][2], self.out_ann, data) def handle_reg_0x00(self, databyte): - self.block_ss = self.ss + self.ss_block = self.ss self.sx = databyte self.putx([0, ['Analog stick X position: 0x%02X' % self.sx, 'SX: 0x%02X' % self.sx]]) @@ -94,7 +94,7 @@ class Decoder(srd.Decoder): 'AZ[9:2]: 0x%03X' % self.az]]) def handle_reg_0x05(self, databyte): - self.block_es = self.es + self.es_block = self.es self.bz = (databyte & (1 << 0)) >> 0 # Bits[0:0] self.bc = (databyte & (1 << 1)) >> 1 # Bits[1:1] ax_rest = (databyte & (3 << 2)) >> 2 # Bits[3:2] @@ -170,7 +170,7 @@ class Decoder(srd.Decoder): if cmd != 'START': return self.state = 'GET SLAVE ADDR' - self.block_start_sample = ss + self.ss_block = ss elif self.state == 'GET SLAVE ADDR': # Wait for an address read/write operation. if cmd == 'ADDRESS READ': @@ -183,7 +183,7 @@ class Decoder(srd.Decoder): handle_reg(databyte) self.reg += 1 elif cmd == 'STOP': - self.block_end_sample = es + self.es_block = es self.output_full_block_if_possible() self.sx = self.sy = self.ax = self.ay = self.az = -1 self.bz = self.bc = -1 @@ -195,7 +195,7 @@ class Decoder(srd.Decoder): if cmd == 'DATA WRITE': self.handle_reg_write(databyte) elif cmd == 'STOP': - self.block_end_sample = es + self.es_block = es self.output_init_seq() self.init_seq = [] self.state = 'IDLE' diff --git a/decoders/onewire_network/pd.py b/decoders/onewire_network/pd.py index 5c836c2..bddc4a8 100644 --- a/decoders/onewire_network/pd.py +++ b/decoders/onewire_network/pd.py @@ -46,8 +46,8 @@ class Decoder(srd.Decoder): ) def __init__(self, **kwargs): - self.beg = 0 - self.end = 0 + self.ss_block = 0 + self.es_block = 0 self.state = 'COMMAND' self.bit_cnt = 0 self.search = 'P' @@ -62,11 +62,11 @@ class Decoder(srd.Decoder): def putx(self, data): # Helper function for most annotations. - self.put(self.beg, self.end, self.out_ann, data) + self.put(self.ss_block, self.es_block, self.out_ann, data) def puty(self, data): # Helper function for most protocol packets. - self.put(self.beg, self.end, self.out_python, data) + self.put(self.ss_block, self.es_block, self.out_python, data) def decode(self, ss, es, data): code, val = data @@ -131,13 +131,13 @@ class Decoder(srd.Decoder): def onewire_collect(self, length, val, ss, es): # Storing the sample this sequence begins with. if self.bit_cnt == 1: - self.beg = ss + self.ss_block = ss self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt) self.bit_cnt += 1 # Storing the sample this sequence ends with. # In case the full length of the sequence is received, return 1. if self.bit_cnt == length: - self.end = es + self.es_block = es self.data = self.data & ((1 << length) - 1) self.bit_cnt = 0 return 1 @@ -148,7 +148,7 @@ class Decoder(srd.Decoder): def onewire_search(self, length, val, ss, es): # Storing the sample this sequence begins with. if (self.bit_cnt == 0) and (self.search == 'P'): - self.beg = ss + self.ss_block = ss if self.search == 'P': # Master receives an original address bit. @@ -169,7 +169,7 @@ class Decoder(srd.Decoder): # Storing the sample this sequence ends with. # In case the full length of the sequence is received, return 1. if self.bit_cnt == length: - self.end = es + self.es_block = es self.data_p = self.data_p & ((1 << length) - 1) self.data_n = self.data_n & ((1 << length) - 1) self.data = self.data & ((1 << length) - 1) diff --git a/decoders/rgb_led_spi/pd.py b/decoders/rgb_led_spi/pd.py index d7d8e58..4749e45 100644 --- a/decoders/rgb_led_spi/pd.py +++ b/decoders/rgb_led_spi/pd.py @@ -34,14 +34,14 @@ class Decoder(srd.Decoder): ) def __init__(self, **kwargs): - self.cmd_ss, self.cmd_es = 0, 0 + self.ss_cmd, self.es_cmd = 0, 0 self.mosi_bytes = [] def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): - self.put(self.cmd_ss, self.cmd_es, self.out_ann, data) + self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def decode(self, ss, es, data): ptype, mosi, miso = data @@ -52,7 +52,7 @@ class Decoder(srd.Decoder): self.ss, self.es = ss, es if len(self.mosi_bytes) == 0: - self.cmd_ss = ss + self.ss_cmd = ss self.mosi_bytes.append(mosi) # RGB value == 3 bytes @@ -62,6 +62,6 @@ class Decoder(srd.Decoder): red, green, blue = self.mosi_bytes rgb_value = int(red) << 16 | int(green) << 8 | int(blue) - self.cmd_es = es + self.es_cmd = es self.putx([0, ['#%.6x' % rgb_value]]) self.mosi_bytes = [] diff --git a/decoders/rtc8564/pd.py b/decoders/rtc8564/pd.py index e95ff10..24a68fb 100644 --- a/decoders/rtc8564/pd.py +++ b/decoders/rtc8564/pd.py @@ -189,7 +189,7 @@ class Decoder(srd.Decoder): if cmd != 'START': return self.state = 'GET SLAVE ADDR' - self.block_start_sample = ss + self.ss_block = ss elif self.state == 'GET SLAVE ADDR': # Wait for an address write operation. # TODO: We should only handle packets to the RTC slave (0xa2/0xa3). @@ -220,7 +220,7 @@ class Decoder(srd.Decoder): # TODO: Handle read/write of only parts of these items. d = '%02d.%02d.%02d %02d:%02d:%02d' % (self.days, self.months, self.years, self.hours, self.minutes, self.seconds) - self.put(self.block_start_sample, es, self.out_ann, + self.put(self.ss_block, es, self.out_ann, [9, ['Write date/time: %s' % d, 'Write: %s' % d, 'W: %s' % d]]) self.state = 'IDLE' @@ -246,7 +246,7 @@ class Decoder(srd.Decoder): elif cmd == 'STOP': d = '%02d.%02d.%02d %02d:%02d:%02d' % (self.days, self.months, self.years, self.hours, self.minutes, self.seconds) - self.put(self.block_start_sample, es, self.out_ann, + self.put(self.ss_block, es, self.out_ann, [10, ['Read date/time: %s' % d, 'Read: %s' % d, 'R: %s' % d]]) self.state = 'IDLE' diff --git a/decoders/sdcard_spi/pd.py b/decoders/sdcard_spi/pd.py index 6717c81..bc761ee 100644 --- a/decoders/sdcard_spi/pd.py +++ b/decoders/sdcard_spi/pd.py @@ -99,8 +99,8 @@ class Decoder(srd.Decoder): def __init__(self, **kwargs): self.state = 'IDLE' self.ss, self.es = 0, 0 - self.bit_ss, self.bit_es = 0, 0 - self.cmd_ss, self.cmd_es = 0, 0 + self.ss_bit, self.es_bit = 0, 0 + self.ss_cmd, self.es_cmd = 0, 0 self.cmd_token = [] self.cmd_token_bits = [] self.is_acmd = False # Indicates CMD vs. ACMD @@ -112,13 +112,13 @@ class Decoder(srd.Decoder): self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): - self.put(self.cmd_ss, self.cmd_es, self.out_ann, data) + self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) def putc(self, cmd, desc): self.putx([cmd, ['%s: %s' % (self.cmd_str, desc)]]) def putb(self, data): - self.put(self.bit_ss, self.bit_es, self.out_ann, data) + self.put(self.ss_bit, self.es_bit, self.out_ann, data) def cmd_name(self, cmd): c = acmd_names if self.is_acmd else cmd_names @@ -136,7 +136,7 @@ class Decoder(srd.Decoder): # - CMD[00:00]: End bit (always 1) if len(self.cmd_token) == 0: - self.cmd_ss = self.ss + self.ss_cmd = self.ss self.cmd_token.append(mosi) self.cmd_token_bits.append(self.mosi_bits) @@ -145,7 +145,7 @@ class Decoder(srd.Decoder): if len(self.cmd_token) < 6: return - self.cmd_es = self.es + self.es_cmd = self.es t = self.cmd_token @@ -156,14 +156,14 @@ class Decoder(srd.Decoder): return self.cmd_token_bits[5 - byte][bit] # Bits[47:47]: Start bit (always 0) - bit, self.bit_ss, self.bit_es = tb(5, 7)[0], tb(5, 7)[1], tb(5, 7)[2] + bit, self.ss_bit, self.es_bit = tb(5, 7)[0], tb(5, 7)[1], tb(5, 7)[2] if bit == 0: self.putb([134, ['Start bit: %d' % bit]]) else: self.putb([135, ['Start bit: %s (Warning: Must be 0!)' % bit]]) # Bits[46:46]: Transmitter bit (1 == host) - bit, self.bit_ss, self.bit_es = tb(5, 6)[0], tb(5, 6)[1], tb(5, 6)[2] + bit, self.ss_bit, self.es_bit = tb(5, 6)[0], tb(5, 6)[1], tb(5, 6)[2] if bit == 1: self.putb([134, ['Transmitter bit: %d' % bit]]) else: @@ -171,22 +171,22 @@ class Decoder(srd.Decoder): # Bits[45:40]: Command index (BCD; valid: 0-63) cmd = self.cmd_index = t[0] & 0x3f - self.bit_ss, self.bit_es = tb(5, 5)[1], tb(5, 0)[2] + self.ss_bit, self.es_bit = tb(5, 5)[1], tb(5, 0)[2] self.putb([134, ['Command: %s%d (%s)' % (s, cmd, self.cmd_name(cmd))]]) # Bits[39:8]: Argument self.arg = (t[1] << 24) | (t[2] << 16) | (t[3] << 8) | t[4] - self.bit_ss, self.bit_es = tb(4, 7)[1], tb(1, 0)[2] + self.ss_bit, self.es_bit = tb(4, 7)[1], tb(1, 0)[2] self.putb([134, ['Argument: 0x%04x' % self.arg]]) # Bits[7:1]: CRC7 # TODO: Check CRC7. crc = t[5] >> 1 - self.bit_ss, self.bit_es = tb(0, 7)[1], tb(0, 1)[2] + self.ss_bit, self.es_bit = tb(0, 7)[1], tb(0, 1)[2] self.putb([134, ['CRC7: 0x%01x' % crc]]) # Bits[0:0]: End bit (always 1) - bit, self.bit_ss, self.bit_es = tb(0, 0)[0], tb(0, 0)[1], tb(0, 0)[2] + bit, self.ss_bit, self.es_bit = tb(0, 0)[0], tb(0, 0)[1], tb(0, 0)[2] self.putb([134, ['End bit: %d' % bit]]) if bit == 1: self.putb([134, ['End bit: %d' % bit]]) @@ -211,8 +211,8 @@ class Decoder(srd.Decoder): # CMD1: SEND_OP_COND self.putc(1, 'Send HCS info and activate the card init process') hcs = (self.arg & (1 << 30)) >> 30 - self.bit_ss = self.cmd_token_bits[5 - 4][6][1] - self.bit_es = self.cmd_token_bits[5 - 4][6][2] + self.ss_bit = self.cmd_token_bits[5 - 4][6][1] + self.es_bit = self.cmd_token_bits[5 - 4][6][2] self.putb([134, ['HCS: %d' % hcs]]) self.state = 'GET RESPONSE R1' @@ -220,13 +220,13 @@ class Decoder(srd.Decoder): # CMD9: SEND_CSD (128 bits / 16 bytes) self.putc(9, 'Ask card to send its card specific data (CSD)') if len(self.read_buf) == 0: - self.cmd_ss = self.ss + self.ss_cmd = self.ss self.read_buf.append(self.miso) # FIXME ### if len(self.read_buf) < 16: if len(self.read_buf) < 16 + 4: return - self.cmd_es = self.es + self.es_cmd = self.es self.read_buf = self.read_buf[4:] # TODO: Document or redo. self.putx([9, ['CSD: %s' % self.read_buf]]) # TODO: Decode all bits. @@ -256,11 +256,11 @@ class Decoder(srd.Decoder): # CMD17: READ_SINGLE_BLOCK self.putc(17, 'Read a block from address 0x%04x' % self.arg) if len(self.read_buf) == 0: - self.cmd_ss = self.ss + self.ss_cmd = self.ss self.read_buf.append(self.miso) if len(self.read_buf) < self.blocklen + 2: # FIXME return - self.cmd_es = self.es + self.es_cmd = self.es self.read_buf = self.read_buf[2:] # FIXME self.putx([17, ['Block data: %s' % self.read_buf]]) self.read_buf = [] @@ -331,12 +331,12 @@ class Decoder(srd.Decoder): # The R1 response token format (1 byte). # Sent by the card after every command except for SEND_STATUS. - self.cmd_ss, self.cmd_es = self.miso_bits[7][1], self.miso_bits[0][2] + self.ss_cmd, self.es_cmd = self.miso_bits[7][1], self.miso_bits[0][2] self.putx([65, ['R1: 0x%02x' % res]]) def putbit(bit, data): b = self.miso_bits[bit] - self.bit_ss, self.bit_es = b[1], b[2] + self.ss_bit, self.es_bit = b[1], b[2] self.putb([134, data]) # Bit 0: 'In idle state' bit diff --git a/decoders/spi/pd.py b/decoders/spi/pd.py index 97d5571..8579258 100644 --- a/decoders/spi/pd.py +++ b/decoders/spi/pd.py @@ -116,7 +116,7 @@ class Decoder(srd.Decoder): self.misodata = self.mosidata = 0 self.misobits = [] self.mosibits = [] - self.startsample = -1 + self.ss_block = -1 self.samplenum = -1 self.cs_was_deasserted = False self.oldcs = -1 @@ -134,7 +134,7 @@ class Decoder(srd.Decoder): meta=(int, 'Bitrate', 'Bitrate during transfers')) def putw(self, data): - self.put(self.startsample, self.samplenum, self.out_ann, data) + self.put(self.ss_block, self.samplenum, self.out_ann, data) def putdata(self): # Pass MISO and MOSI bits and then data to the next PD up the stack. @@ -175,7 +175,7 @@ class Decoder(srd.Decoder): def handle_bit(self, miso, mosi, clk, cs): # If this is the first bit of a dataword, save its sample number. if self.bitcount == 0: - self.startsample = self.samplenum + self.ss_block = self.samplenum self.cs_was_deasserted = False if self.have_cs: active_low = (self.options['cs_polarity'] == 'active-low') @@ -225,9 +225,9 @@ class Decoder(srd.Decoder): # Meta bitrate. elapsed = 1 / float(self.samplerate) - elapsed *= (self.samplenum - self.startsample + 1) + elapsed *= (self.samplenum - self.ss_block + 1) bitrate = int(1 / elapsed * self.options['wordsize']) - self.put(self.startsample, self.samplenum, self.out_bitrate, bitrate) + self.put(self.ss_block, self.samplenum, self.out_bitrate, bitrate) if self.have_cs and self.cs_was_deasserted: self.putw([4, ['CS# was deasserted during this data word!']]) diff --git a/decoders/tca6408a/pd.py b/decoders/tca6408a/pd.py index d53d8fc..1f90245 100644 --- a/decoders/tca6408a/pd.py +++ b/decoders/tca6408a/pd.py @@ -91,7 +91,6 @@ class Decoder(srd.Decoder): if cmd != 'START': return self.state = 'GET SLAVE ADDR' - self.block_start_sample = ss elif self.state == 'GET SLAVE ADDR': self.chip = databyte self.state = 'GET REG ADDR'