From: Uwe Hermann <redacted>
Date: Tue, 3 Jul 2012 23:19:35 +0000 (+0200)
Subject: unfinished update to onewire protocol decoder
X-Git-Tag: libsigrokdecode-0.1.1~72
X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=commitdiff_plain;h=0631e33dc11b621914af0e76a1864567557ebdc4

unfinished update to onewire protocol decoder
---

diff --git a/configure.ac b/configure.ac
index 7bb760f..abc2a37 100644
--- a/configure.ac
+++ b/configure.ac
@@ -171,6 +171,7 @@ AC_CONFIG_FILES([Makefile
 		 decoders/usb/Makefile
 		 decoders/usb_signalling/Makefile
 		 decoders/usb_protocol/Makefile
+		 decoders/onewire/Makefile
 		])
 
 AC_OUTPUT
diff --git a/decoders/Makefile.am b/decoders/Makefile.am
index 9f3f269..3e3ff53 100644
--- a/decoders/Makefile.am
+++ b/decoders/Makefile.am
@@ -42,5 +42,6 @@ SUBDIRS = \
 	uart_dump \
 	usb \
 	usb_signalling \
-	usb_protocol
+	usb_protocol \
+	onewire
 
diff --git a/decoders/onewire/onewire.py b/decoders/onewire/onewire.py
index 38cc0b8..92cc7dc 100644
--- a/decoders/onewire/onewire.py
+++ b/decoders/onewire/onewire.py
@@ -94,7 +94,7 @@ class Decoder(srd.Decoder):
         pass
 
     def decode(self, ss, es, data):
-        for (self.samplenum, (owr, pwr)) in data:
+        for (self.samplenum, owr) in data:
 
             # Data link layer
 
@@ -133,7 +133,7 @@ class Decoder(srd.Decoder):
                     if (self.lnk_bit) :  self.lnk_state = 'WAIT FOR FALLING EDGE'
                     else              :  self.lnk_state = 'WAIT FOR RISING EDGE'
             else:
-                raise Exception('Invalid lnk_state: %s' % self.lnk_state)
+                raise Exception('Invalid lnk_state: %d' % self.lnk_state)
 
             # Network layer
             
@@ -149,10 +149,8 @@ class Decoder(srd.Decoder):
                     self.net_cnt = self.net_cnt + 1
                     self.net_cmd = (self.net_cmd << 1) & self.lnk_bit
                     if (self.lnk_cnt == 8):
-                        self.put(self.startsample, self.samplenum,
-                                 self.out_proto, ['LNK: BYTE', self.lnk_byte])
-                        self.put(self.startsample, self.samplenum, self.out_ann,
-                                 [ANN_DEC, ['LNK: BYTE: ' + self.lnk_byte]])
+                        self.put(self.startsample, self.samplenum, self.out_proto, ['LNK: BYTE', self.lnk_byte])
+                        self.put(self.startsample, self.samplenum, self.out_ann  , ['LNK: BYTE', self.lnk_byte])
                         if   (self.net_cmd == 0x33):
                             # READ ROM
                             break
@@ -179,9 +177,9 @@ class Decoder(srd.Decoder):
                     #
                     break
                 else:
-                    raise Exception('Invalid net_state: %s' % self.net_state)
+                    raise Exception('Invalid net_state: %d' % self.net_state)
             elif not (self.lnk_event == "NONE"):
-                raise Exception('Invalid net_event: %s' % self.net_event)
+                raise Exception('Invalid net_event: %d' % self.net_event)