]> sigrok.org Git - libsigrokdecode.git/commitdiff
srd: SPI: Add support for bit order option.
authorUwe Hermann <redacted>
Sat, 14 Jan 2012 17:08:00 +0000 (18:08 +0100)
committerUwe Hermann <redacted>
Sat, 14 Jan 2012 17:08:00 +0000 (18:08 +0100)
decoders/spi.py

index 457abb5bde2f962cdd2c325023944eb6e9017aa9..0c98c1dea4e40b91b02912e62bece9624cb9736f 100644 (file)
@@ -112,11 +112,17 @@ class Decoder(srd.Decoder):
             if self.bitcount == 0:
                 self.start_sample = samplenum
 
-            # Receive bit into our shift register.
-            if mosi == 1:
-                self.mosidata |= 1 << (7 - self.bitcount)
-            if miso == 1:
-                self.misodata |= 1 << (7 - self.bitcount)
+            # Receive MOSI bit into our shift register.
+            if self.bit_order == MSB_FIRST:
+                self.mosidata |= mosi << (7 - self.bitcount)
+            else:
+                self.mosidata |= mosi << self.bitcount
+
+            # Receive MISO bit into our shift register.
+            if self.bit_order == MSB_FIRST:
+                self.misodata |= miso << (7 - self.bitcount)
+            else:
+                self.misodata |= miso << self.bitcount
 
             self.bitcount += 1