X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=scripts%2Fi2c.py;h=973751b466be40181be530cee0b4634f8505b23e;hp=46c338175eb78c8fdd18d85cddbb3dac73df3686;hb=930bd9d961b9a13259ffb4997be9fa6ebcdb9da9;hpb=a5fdab452f682e50cc05d6f392f750473fd93e78

diff --git a/scripts/i2c.py b/scripts/i2c.py
index 46c3381..973751b 100644
--- a/scripts/i2c.py
+++ b/scripts/i2c.py
@@ -84,8 +84,8 @@ def sigrokdecode_i2c(inbuf):
 
 	# Get SCL/SDA bit values (0/1 for low/high) of the first sample.
 	s = ord(inbuf[0])
-	oldscl = (s & (1 << scl_bit)) != 0
-	oldsda = (s & (1 << sda_bit)) != 0
+	oldscl = (s & (1 << scl_bit)) >> scl_bit
+	oldsda = (s & (1 << sda_bit)) >> sda_bit
 
 	# Loop over all samples.
 	# TODO: Handle LAs with more/less than 8 channels.
@@ -94,8 +94,8 @@ def sigrokdecode_i2c(inbuf):
 		s = ord(s) # FIXME
 
 		# Get SCL/SDA bit values (0/1 for low/high).
-		scl = (s & (1 << scl_bit)) != 0
-		sda = (s & (1 << sda_bit)) != 0
+		scl = (s & (1 << scl_bit)) >> scl_bit
+		sda = (s & (1 << sda_bit)) >> sda_bit
 
 		# TODO: Wait until the bus is idle (SDA = SCL = 1) first?