X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fwiegand%2Fpd.py;h=3edefc5b00494d548c547e85bea481c5c3cec1d1;hp=2352fbc85c5000e8407e012feb303f654028672c;hb=1b9ef18be867133e721681cbc20272cf5c669504;hpb=92b7b49f6964f57a7d6fc4473645c993cfa4ba52 diff --git a/decoders/wiegand/pd.py b/decoders/wiegand/pd.py index 2352fbc..3edefc5 100644 --- a/decoders/wiegand/pd.py +++ b/decoders/wiegand/pd.py @@ -14,14 +14,13 @@ ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## along with this program; if not, see . ## import sigrokdecode as srd class Decoder(srd.Decoder): - api_version = 2 + api_version = 3 id = 'wiegand' name = 'Wiegand' longname = 'Wiegand interface' @@ -55,7 +54,7 @@ class Decoder(srd.Decoder): self._d1_prev = None self._state = None - self._ss_state = None + self.ss_state = None self.ss_bit = None self.es_bit = None @@ -65,7 +64,7 @@ class Decoder(srd.Decoder): def start(self): 'Register output types and verify user supplied decoder values.' self.out_ann = self.register(srd.OUTPUT_ANN) - self._active = self.options['active'] == 'high' and 1 or 0 + self._active = 1 if self.options['active'] == 'high' else 0 self._inactive = 1 - self._active def metadata(self, key, value): @@ -98,13 +97,16 @@ class Decoder(srd.Decoder): elif self._state == 'invalid': ann = [1, [self._state]] if ann: - self.put(self._ss_state, self.samplenum, self.out_ann, ann) - self._ss_state = self.samplenum + self.put(self.ss_state, self.samplenum, self.out_ann, ann) + self.ss_state = self.samplenum self._state = state self._bits = [] - def decode(self, ss, es, data): - for self.samplenum, (d0, d1) in data: + def decode(self): + while True: + # TODO: Come up with more appropriate self.wait() conditions. + (d0, d1) = self.wait() + if d0 == self._d0_prev and d1 == self._d1_prev: if self.es_bit and self.samplenum >= self.es_bit: if (d0, d1) == (self._inactive, self._inactive):