X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fusb%2F__init__.py;h=313c4955adf0fe2dd8dac50b5bbd173e9dad0159;hp=1a16f8f9f93e10a037768ffcd5654457dd19646e;hb=2fcd7c22852436c3226de9007e88cb305cce1b00;hpb=c2937021535a0ef11f2905e47447da3b589c65e3

diff --git a/decoders/usb/__init__.py b/decoders/usb/__init__.py
index 1a16f8f..313c495 100644
--- a/decoders/usb/__init__.py
+++ b/decoders/usb/__init__.py
@@ -21,6 +21,8 @@
 '''
 USB (low-speed and full-speed) protocol decoder.
 
+Electrical/signalling layer (USB spec, chapter 7):
+
 USB signalling consists of two signal lines, both driven at 3.3V
 logic levels. The signals are DP (D+) and DM (D-), and normally operate in
 differential mode.
@@ -41,6 +43,8 @@ Data is transferred at a rate of 1.5Mbit/s (low-speed) / 12Mbit/s (full-speed).
 The SE0 transmitted to signal an end-of-packet is two bit intervals long
 (low-speed: 1.25uS - 1.50uS, full-speed: 160ns - 175ns).
 
+Protocol layer (USB spec, chapter 8):
+
 Bit/byte ordering: Bits are sent onto the bus LSB-first. Multibyte fields
 are transmitted in little-endian order (i.e., LSB to MSB).