X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fuart%2Fpd.py;h=c3d1b62dbc5849f16fc4c5cf91f322cf8dfd36f9;hp=c0968fb59d33f5d1a06c14259c3ce572bf0cb2a9;hb=0bb7bcf316b528acbe0ef82f4c1e310e756074bc;hpb=9300bc22bad033204d369884b0f548b1e2a9bc59 diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py index c0968fb..c3d1b62 100644 --- a/decoders/uart/pd.py +++ b/decoders/uart/pd.py @@ -1,7 +1,7 @@ ## ## This file is part of the libsigrokdecode project. ## -## Copyright (C) 2011-2013 Uwe Hermann +## Copyright (C) 2011-2014 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -22,17 +22,31 @@ import sigrokdecode as srd +''' +Protocol output format: + +UART packet: +[, , ] + +This is the list of s and their respective : + - 'STARTBIT': The data is the (integer) value of the start bit (0/1). + - 'DATA': The data is the (integer) value of the UART data. Valid values + range from 0 to 512 (as the data can be up to 9 bits in size). + - 'PARITYBIT': The data is the (integer) value of the parity bit (0/1). + - 'STOPBIT': The data is the (integer) value of the stop bit (0 or 1). + - 'INVALID STARTBIT': The data is the (integer) value of the start bit (0/1). + - 'INVALID STOPBIT': The data is the (integer) value of the stop bit (0/1). + - 'PARITY ERROR': The data is a tuple with two entries. The first one is + the expected parity value, the second is the actual parity value. + - TODO: Frame error? + +The field is 0 for RX packets, 1 for TX packets. +''' + # Used for differentiating between the two data directions. RX = 0 TX = 1 -# Annotation feed formats -ANN_ASCII = 0 -ANN_DEC = 1 -ANN_HEX = 2 -ANN_OCT = 3 -ANN_BITS = 4 - # Given a parity type to check (odd, even, zero, one), the value of the # parity bit, the value of the data, and the length of the data (5-9 bits, # usually 8 bits) return True if the parity is correct, False otherwise. @@ -79,15 +93,22 @@ class Decoder(srd.Decoder): 'parity_check': ['Check parity?', 'yes'], # TODO: Bool supported? 'num_stop_bits': ['Stop bit(s)', '1'], # String! 0, 0.5, 1, 1.5. 'bit_order': ['Bit order', 'lsb-first'], + 'format': ['Data format', 'ascii'], # ascii/dec/hex/oct/bin # TODO: Options to invert the signal(s). } annotations = [ - ['ASCII', 'Data bytes as ASCII characters'], - ['Decimal', 'Databytes as decimal, integer values'], - ['Hex', 'Data bytes in hex format'], - ['Octal', 'Data bytes as octal numbers'], - ['Bits', 'Data bytes in bit notation (sequence of 0/1 digits)'], + ['RX data', 'UART RX data'], + ['TX data', 'UART TX data'], + ['Start bits', 'UART start bits'], + ['Parity bits', 'UART parity bits'], + ['Stop bits', 'UART stop bits'], + ['Warnings', 'Warnings'], ] + binary = ( + ('rx', 'RX dump'), + ('tx', 'TX dump'), + ('rxtx', 'RX/TX dump'), + ) def putx(self, rxtx, data): s, halfbit = self.startsample[rxtx], int(self.bit_width / 2) @@ -101,7 +122,12 @@ class Decoder(srd.Decoder): s, halfbit = self.samplenum, int(self.bit_width / 2) self.put(s - halfbit, s + halfbit, self.out_proto, data) + def putbin(self, rxtx, data): + s, halfbit = self.startsample[rxtx], int(self.bit_width / 2) + self.put(s - halfbit, self.samplenum + halfbit, self.out_bin, data) + def __init__(self, **kwargs): + self.samplerate = None self.samplenum = 0 self.frame_start = [-1, -1] self.startbit = [-1, -1] @@ -114,17 +140,16 @@ class Decoder(srd.Decoder): self.oldbit = [1, 1] self.oldpins = [1, 1] - def start(self, metadata): - self.samplerate = metadata['samplerate'] - self.out_proto = self.add(srd.OUTPUT_PROTO, 'uart') - self.out_ann = self.add(srd.OUTPUT_ANN, 'uart') - - # The width of one UART bit in number of samples. - self.bit_width = \ - float(self.samplerate) / float(self.options['baudrate']) + def start(self): + self.out_proto = self.register(srd.OUTPUT_PYTHON) + self.out_bin = self.register(srd.OUTPUT_BINARY) + self.out_ann = self.register(srd.OUTPUT_ANN) - def report(self): - pass + def metadata(self, key, value): + if key == srd.SRD_CONF_SAMPLERATE: + self.samplerate = value; + # The width of one UART bit in number of samples. + self.bit_width = float(self.samplerate) / float(self.options['baudrate']) # Return true if we reached the middle of the desired bit, false otherwise. def reached_bit(self, rxtx, bitnum): @@ -173,7 +198,7 @@ class Decoder(srd.Decoder): self.state[rxtx] = 'GET DATA BITS' self.putp(['STARTBIT', rxtx, self.startbit[rxtx]]) - self.putg([ANN_ASCII, ['Start bit', 'Start', 'S']]) + self.putg([2, ['Start bit', 'Start', 'S']]) def get_data_bits(self, rxtx, signal): # Skip samples until we're in the middle of the desired data bit. @@ -205,13 +230,23 @@ class Decoder(srd.Decoder): self.putp(['DATA', rxtx, self.databyte[rxtx]]) - s = 'RX: ' if (rxtx == RX) else 'TX: ' - b = self.databyte[rxtx] - self.putx(rxtx, [ANN_ASCII, [s + chr(b)]]) - self.putx(rxtx, [ANN_DEC, [s + str(b)]]) - self.putx(rxtx, [ANN_HEX, [s + hex(b)[2:]]]) - self.putx(rxtx, [ANN_OCT, [s + oct(b)[2:]]]) - self.putx(rxtx, [ANN_BITS, [s + bin(b)[2:]]]) + b, f = self.databyte[rxtx], self.options['format'] + if f == 'ascii': + c = chr(b) if chr(b).isprintable() else '[%02X]' % b + self.putx(rxtx, [rxtx, [c]]) + elif f == 'dec': + self.putx(rxtx, [rxtx, [str(b)]]) + elif f == 'hex': + self.putx(rxtx, [rxtx, [hex(b)[2:].zfill(2).upper()]]) + elif f == 'oct': + self.putx(rxtx, [rxtx, [oct(b)[2:].zfill(3)]]) + elif f == 'bin': + self.putx(rxtx, [rxtx, [bin(b)[2:].zfill(8)]]) + else: + raise Exception('Invalid data format option: %s' % f) + + self.putbin(rxtx, (rxtx, bytes([b]))) + self.putbin(rxtx, (2, bytes([b]))) def get_parity_bit(self, rxtx, signal): # If no parity is used/configured, skip to the next state immediately. @@ -230,11 +265,11 @@ class Decoder(srd.Decoder): if parity_ok(self.options['parity_type'], self.paritybit[rxtx], self.databyte[rxtx], self.options['num_data_bits']): self.putp(['PARITYBIT', rxtx, self.paritybit[rxtx]]) - self.putg([ANN_ASCII, ['Parity bit', 'Parity', 'P']]) + self.putg([3, ['Parity bit', 'Parity', 'P']]) else: # TODO: Return expected/actual parity values. self.putp(['PARITY ERROR', rxtx, (0, 1)]) # FIXME: Dummy tuple... - self.putg([ANN_ASCII, ['Parity error', 'Parity err', 'PE']]) + self.putg([5, ['Parity error', 'Parity err', 'PE']]) # TODO: Currently only supports 1 stop bit. def get_stop_bits(self, rxtx, signal): @@ -249,14 +284,17 @@ class Decoder(srd.Decoder): # Stop bits must be 1. If not, we report an error. if self.stopbit1[rxtx] != 1: self.putp(['INVALID STOPBIT', rxtx, self.stopbit1[rxtx]]) + self.putg([5, ['Frame error', 'Frame err', 'FE']]) # TODO: Abort? Ignore the frame? Other? self.state[rxtx] = 'WAIT FOR START BIT' self.putp(['STOPBIT', rxtx, self.stopbit1[rxtx]]) - self.putg([ANN_ASCII, ['Stop bit', 'Stop', 'P']]) + self.putg([4, ['Stop bit', 'Stop', 'T']]) def decode(self, ss, es, data): + if self.samplerate is None: + raise Exception("Cannot decode without samplerate.") # TODO: Either RX or TX could be omitted (optional probe). for (self.samplenum, pins) in data: