X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Ftlc5620%2Fpd.py;h=e086c4d811dd527659437b6a0744a60409ce07cf;hp=0f9b2a1a4cfbbbdafa6cc85b1a9b8dfb9c4f31a2;hb=a945c53611b3c8bdfd5d30fec7675320213acfe0;hpb=3992b1e180283036ad4a834419b73d5d3eb53089 diff --git a/decoders/tlc5620/pd.py b/decoders/tlc5620/pd.py index 0f9b2a1..e086c4d 100644 --- a/decoders/tlc5620/pd.py +++ b/decoders/tlc5620/pd.py @@ -54,6 +54,7 @@ class Decoder(srd.Decoder): ('reg-write', 'Register write'), ('voltage-update', 'Voltage update'), ('voltage-update-all', 'Voltage update (all DACs)'), + ('invalid-cmd', 'Invalid command'), ) annotation_rows = ( ('bits', 'Bits', (5,)), @@ -61,6 +62,7 @@ class Decoder(srd.Decoder): ('registers', 'Registers', (6, 7)), ('voltage-updates', 'Voltage updates', (8,)), ('events', 'Events', (3, 4)), + ('errors', 'Errors', (9,)), ) def __init__(self, **kwargs): @@ -81,6 +83,16 @@ class Decoder(srd.Decoder): if len(self.bits) > 11: self.bits = self.bits[-11:] + # If there are less than 11 bits, something is probably wrong. + if len(self.bits) < 11: + ss, es = self.samplenum, self.samplenum + if len(self.bits) >= 2: + ss = self.bits[0][1] + es = self.bits[-1][1] + (self.bits[1][1] - self.bits[0][1]) + self.put(ss, es, self.out_ann, [9, ['Command too short']]) + self.bits = [] + return False + self.ss_dac = self.bits[0][1] self.es_dac = self.ss_gain = self.bits[2][1] self.es_gain = self.ss_value = self.bits[3][1] @@ -115,8 +127,11 @@ class Decoder(srd.Decoder): self.bits = [] + return True + def handle_falling_edge_load(self): - self.handle_11bits() + if not self.handle_11bits(): + return s, v, g = self.dac_select, self.dac_value, self.gain self.put(self.samplenum, self.samplenum, self.out_ann, [3, ['Falling edge on LOAD', 'LOAD fall', 'F']])