X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Ftlc5620%2Fpd.py;h=6e7c454df13d30c872eea856a54b9e58821e56d3;hp=313adcaf7a961b2dc6b5188145451d506838bc4d;hb=21b39043472eeeb2e0155eafc73247f5010af714;hpb=f2a5df42ea41e6c4370d4efa1a27ab942ba1ddff diff --git a/decoders/tlc5620/pd.py b/decoders/tlc5620/pd.py index 313adca..6e7c454 100644 --- a/decoders/tlc5620/pd.py +++ b/decoders/tlc5620/pd.py @@ -18,8 +18,6 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# Texas Instruments TLC5620 protocol decoder - import sigrokdecode as srd dacs = { @@ -30,7 +28,7 @@ dacs = { } class Decoder(srd.Decoder): - api_version = 1 + api_version = 2 id = 'tlc5620' name = 'TI TLC5620' longname = 'Texas Instruments TLC5620' @@ -38,22 +36,21 @@ class Decoder(srd.Decoder): license = 'gplv2+' inputs = ['logic'] outputs = ['tlc5620'] - probes = [ + channels = ( {'id': 'clk', 'name': 'CLK', 'desc': 'Serial interface clock'}, {'id': 'data', 'name': 'DATA', 'desc': 'Serial interface data'}, - ] - optional_probes = [ + ) + optional_channels = ( {'id': 'load', 'name': 'LOAD', 'desc': 'Serial interface load control'}, {'id': 'ldac', 'name': 'LDAC', 'desc': 'Load DAC'}, - ] - options = {} - annotations = [ - ['dac_select', 'DAC select'], - ['gain', 'Gain'], - ['value', 'DAC value'], - ['data_latch', 'Data latch point'], - ['ldac_fall', 'LDAC falling edge'], - ] + ) + annotations = ( + ('dac-select', 'DAC select'), + ('gain', 'Gain'), + ('value', 'DAC value'), + ('data-latch', 'Data latch point'), + ('ldac-fall', 'LDAC falling edge'), + ) def __init__(self, **kwargs): self.oldpins = self.oldclk = self.oldload = self.oldldac = None @@ -65,14 +62,10 @@ class Decoder(srd.Decoder): self.dac_select = self.gain = self.dac_value = None def start(self): - # self.out_proto = self.add(srd.OUTPUT_PYTHON, 'tlc5620') - self.out_ann = self.add(srd.OUTPUT_ANN, 'tlc5620') - - def report(self): - pass + self.out_ann = self.register(srd.OUTPUT_ANN) def handle_11bits(self): - s = "".join(str(i) for i in self.bits[:2]) + s = ''.join(str(i) for i in self.bits[:2]) self.dac_select = s = dacs[int(s, 2)] self.put(self.ss_dac, self.es_dac, self.out_ann, [0, ['DAC select: %s' % s, 'DAC sel: %s' % s, @@ -82,7 +75,7 @@ class Decoder(srd.Decoder): self.put(self.ss_gain, self.es_gain, self.out_ann, [1, ['Gain: x%d' % g, 'G: x%d' % g, 'x%d' % g]]) - s = "".join(str(i) for i in self.bits[3:]) + s = ''.join(str(i) for i in self.bits[3:]) self.dac_value = v = int(s, 2) self.put(self.ss_value, self.es_value, self.out_ann, [2, ['DAC value: %d' % v, 'Value: %d' % v, 'Val: %d' % v,