X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fspi%2Fpd.py;h=7b979f0762bf3e50e555627344f26f916ec9c272;hp=1252a6a07cb7f7728872d23e512249970cd4ff58;hb=d399c64172cdf99637b63b01d2af1e509ed6b059;hpb=15814cab085d57db0448a8a5ddd18fd776c68530 diff --git a/decoders/spi/pd.py b/decoders/spi/pd.py index 1252a6a..7b979f0 100644 --- a/decoders/spi/pd.py +++ b/decoders/spi/pd.py @@ -70,9 +70,6 @@ spi_mode = { (1, 1): 3, # Mode 3 } -class SamplerateError(Exception): - pass - class ChannelError(Exception): pass @@ -125,7 +122,6 @@ class Decoder(srd.Decoder): def __init__(self): self.samplerate = None - self.oldclk = 1 self.bitcount = 0 self.misodata = self.mosidata = 0 self.misobits = [] @@ -136,7 +132,6 @@ class Decoder(srd.Decoder): self.samplenum = -1 self.ss_transfer = -1 self.cs_was_deasserted = False - self.oldcs = None self.have_cs = self.have_miso = self.have_mosi = None def metadata(self, key, value): @@ -147,8 +142,9 @@ class Decoder(srd.Decoder): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) self.out_binary = self.register(srd.OUTPUT_BINARY) - self.out_bitrate = self.register(srd.OUTPUT_META, - meta=(int, 'Bitrate', 'Bitrate during transfers')) + if self.samplerate is not None: + self.out_bitrate = self.register(srd.OUTPUT_META, + meta=(int, 'Bitrate', 'Bitrate during transfers')) self.bw = (self.options['wordsize'] + 7) // 8 def putw(self, data): @@ -211,17 +207,18 @@ class Decoder(srd.Decoder): not self.cs_asserted(cs) if self.have_cs else False ws = self.options['wordsize'] + bo = self.options['bitorder'] # Receive MISO bit into our shift register. if self.have_miso: - if self.options['bitorder'] == 'msb-first': + if bo == 'msb-first': self.misodata |= miso << (ws - 1 - self.bitcount) else: self.misodata |= miso << self.bitcount # Receive MOSI bit into our shift register. if self.have_mosi: - if self.options['bitorder'] == 'msb-first': + if bo == 'msb-first': self.mosidata |= mosi << (ws - 1 - self.bitcount) else: self.mosidata |= mosi << self.bitcount @@ -253,22 +250,23 @@ class Decoder(srd.Decoder): self.putdata() # Meta bitrate. - elapsed = 1 / float(self.samplerate) - elapsed *= (self.samplenum - self.ss_block + 1) - bitrate = int(1 / elapsed * self.options['wordsize']) - self.put(self.ss_block, self.samplenum, self.out_bitrate, bitrate) + if self.samplerate is not None: + elapsed = 1 / float(self.samplerate) + elapsed *= (self.samplenum - self.ss_block + 1) + bitrate = int(1 / elapsed * ws) + self.put(self.ss_block, self.samplenum, self.out_bitrate, bitrate) if self.have_cs and self.cs_was_deasserted: self.putw([4, ['CS# was deasserted during this data word!']]) self.reset_decoder_state() - def find_clk_edge(self, miso, mosi, clk, cs): - if self.have_cs and self.oldcs != cs: + def find_clk_edge(self, miso, mosi, clk, cs, first): + if self.have_cs and (first or self.matched[self.have_cs]): # Send all CS# pin value changes. + oldcs = None if first else 1 - cs self.put(self.samplenum, self.samplenum, self.out_python, - ['CS-CHANGE', self.oldcs, cs]) - self.oldcs = cs + ['CS-CHANGE', oldcs, cs]) if self.cs_asserted(cs): self.ss_transfer = self.samplenum @@ -286,11 +284,9 @@ class Decoder(srd.Decoder): return # Ignore sample if the clock pin hasn't changed. - if clk == self.oldclk: + if first or not self.matched[0]: return - self.oldclk = clk - # Sample data on rising/falling clock edge (depends on mode). mode = spi_mode[self.options['cpol'], self.options['cpha']] if mode == 0 and clk == 0: # Sample on rising clock edge @@ -306,30 +302,34 @@ class Decoder(srd.Decoder): self.handle_bit(miso, mosi, clk, cs) def decode(self): - if not self.samplerate: - raise SamplerateError('Cannot decode without samplerate.') - - # Either MISO or MOSI can be omitted (but not both). CS# is optional. + # The CLK input is mandatory. Other signals are (individually) + # optional. Yet either MISO or MOSI (or both) must be provided. + # Tell stacked decoders when we don't have a CS# signal. + if not self.has_channel(0): + raise ChannelError('Either MISO or MOSI (or both) pins required.') self.have_miso = self.has_channel(1) self.have_mosi = self.has_channel(2) - self.have_cs = self.has_channel(3) if not self.have_miso and not self.have_mosi: raise ChannelError('Either MISO or MOSI (or both) pins required.') - - # Tell stacked decoders that we don't have a CS# signal. + self.have_cs = self.has_channel(3) if not self.have_cs: self.put(0, 0, self.out_python, ['CS-CHANGE', None, None]) + # We want all CLK changes. We want all CS changes if CS is used. + # Map 'have_cs' from boolean to an integer index. This simplifies + # evaluation in other locations. + wait_cond = [{0: 'e'}] + if self.have_cs: + self.have_cs = len(wait_cond) + wait_cond.append({3: 'e'}) + # "Pixel compatibility" with the v2 implementation. Grab and # process the very first sample before checking for edges. The - # previous implementation did this by seeding old values with None, - # which led to an immediate "change" in comparison. - pins = self.wait({}) - (clk, miso, mosi, cs) = pins - self.find_clk_edge(miso, mosi, clk, cs) + # previous implementation did this by seeding old values with + # None, which led to an immediate "change" in comparison. + (clk, miso, mosi, cs) = self.wait({}) + self.find_clk_edge(miso, mosi, clk, cs, True) while True: - # Ignore identical samples early on (for performance reasons). - pins = self.wait([{0: 'e'}, {1: 'e'}, {2: 'e'}, {3: 'e'}]) - (clk, miso, mosi, cs) = pins - self.find_clk_edge(miso, mosi, clk, cs) + (clk, miso, mosi, cs) = self.wait(wait_cond) + self.find_clk_edge(miso, mosi, clk, cs, False)