X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fspi%2Fpd.py;h=2cde8bc4170bb1ac2249594a70fddea6b0b11039;hp=2d971d31c4fb8657765489f4a6393eb5046f05f9;hb=7c09dbb2adb240e013d373da8dccb56efd22380e;hpb=bbc100f764f523dbc63daed84be5011432685e9a diff --git a/decoders/spi/pd.py b/decoders/spi/pd.py index 2d971d3..2cde8bc 100644 --- a/decoders/spi/pd.py +++ b/decoders/spi/pd.py @@ -42,8 +42,8 @@ Examples: ['DATA', 0xff, 0x3a] ['BITS', [[1, 80, 82], [1, 83, 84], [1, 85, 86], [1, 87, 88], [1, 89, 90], [1, 91, 92], [1, 93, 94], [1, 95, 96]], - [[0, 80, 82], [0, 83, 84], [1, 85, 86], [1, 87, 88], - [1, 89, 90], [0, 91, 92], [1, 93, 94], [0, 95, 96]]] + [[0, 80, 82], [1, 83, 84], [0, 85, 86], [1, 87, 88], + [1, 89, 90], [1, 91, 92], [0, 93, 94], [0, 95, 96]]] ['DATA', 0x65, 0x00] ['DATA', 0xa8, None] ['DATA', None, 0x55] @@ -109,7 +109,7 @@ class Decoder(srd.Decoder): self.mosibits = [] self.startsample = -1 self.samplenum = -1 - self.cs_was_deasserted_during_data_word = 0 + self.cs_was_deasserted = False self.oldcs = -1 self.oldpins = None self.have_cs = self.have_miso = self.have_mosi = None @@ -125,9 +125,6 @@ class Decoder(srd.Decoder): self.out_bitrate = self.register(srd.OUTPUT_META, meta=(int, 'Bitrate', 'Bitrate during transfers')) - def putpw(self, data): - self.put(self.startsample, self.samplenum, self.out_python, data) - def putw(self, data): self.put(self.startsample, self.samplenum, self.out_ann, data) @@ -137,8 +134,14 @@ class Decoder(srd.Decoder): si = self.mosidata if self.have_mosi else None so_bits = self.misobits if self.have_miso else None si_bits = self.mosibits if self.have_mosi else None - self.putpw(['BITS', si_bits, so_bits]) - self.putpw(['DATA', si, so]) + + if self.have_miso: + ss, es = self.misobits[-1][1], self.misobits[0][2] + if self.have_mosi: + ss, es = self.mosibits[-1][1], self.mosibits[0][2] + + self.put(ss, es, self.out_python, ['BITS', si_bits, so_bits]) + self.put(ss, es, self.out_python, ['DATA', si, so]) # Bit annotations. if self.have_miso: @@ -150,9 +153,9 @@ class Decoder(srd.Decoder): # Dataword annotations. if self.have_miso: - self.putw([0, ['%02X' % self.misodata]]) + self.put(ss, es, self.out_ann, [0, ['%02X' % self.misodata]]) if self.have_mosi: - self.putw([1, ['%02X' % self.mosidata]]) + self.put(ss, es, self.out_ann, [1, ['%02X' % self.mosidata]]) def reset_decoder_state(self): self.misodata = 0 if self.have_miso else None @@ -165,11 +168,12 @@ class Decoder(srd.Decoder): # If this is the first bit of a dataword, save its sample number. if self.bitcount == 0: self.startsample = self.samplenum + self.cs_was_deasserted = False if self.have_cs: active_low = (self.options['cs_polarity'] == 'active-low') - deasserted = cs if active_low else not cs + deasserted = (cs == 1) if active_low else (cs == 0) if deasserted: - self.cs_was_deasserted_during_data_word = 1 + self.cs_was_deasserted = True ws = self.options['wordsize'] @@ -187,20 +191,23 @@ class Decoder(srd.Decoder): else: self.mosidata |= mosi << self.bitcount - # Guesstimate the endsample for this bit (can be overridden later). + # Guesstimate the endsample for this bit (can be overridden below). es = self.samplenum if self.bitcount > 0: - es += self.samplenum - self.misobits[self.bitcount - 1][1] + if self.have_miso: + es += self.samplenum - self.misobits[0][1] + elif self.have_mosi: + es += self.samplenum - self.mosibits[0][1] if self.have_miso: - self.misobits.append([miso, self.samplenum, es]) + self.misobits.insert(0, [miso, self.samplenum, es]) if self.have_mosi: - self.mosibits.append([mosi, self.samplenum, es]) + self.mosibits.insert(0, [mosi, self.samplenum, es]) if self.bitcount > 0 and self.have_miso: - self.misobits[self.bitcount - 1][2] = self.samplenum + self.misobits[1][2] = self.samplenum if self.bitcount > 0 and self.have_mosi: - self.mosibits[self.bitcount - 1][2] = self.samplenum + self.mosibits[1][2] = self.samplenum self.bitcount += 1 @@ -216,7 +223,7 @@ class Decoder(srd.Decoder): bitrate = int(1 / elapsed * self.options['wordsize']) self.put(self.startsample, self.samplenum, self.out_bitrate, bitrate) - if self.have_cs and self.cs_was_deasserted_during_data_word: + if self.have_cs and self.cs_was_deasserted: self.putw([4, ['CS# was deasserted during this data word!']]) self.reset_decoder_state() @@ -264,6 +271,10 @@ class Decoder(srd.Decoder): self.have_mosi = (mosi in (0, 1)) self.have_cs = (cs in (0, 1)) + # Either MISO or MOSI (but not both) can be omitted. + if not (self.have_miso or self.have_mosi): + raise Exception('Either MISO or MOSI (or both) pins required.') + # State machine. if self.state == 'IDLE': self.find_clk_edge(miso, mosi, clk, cs)