X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fspi.py;h=e6a59bf6cbdda9e49482ddc0d3667f8fea2e3d00;hp=0ac8b560ce2318b39cedab04b78457263bcc26fa;hb=9a12a6e7af3d7091d8e35dd1c731402cb80a01b0;hpb=f97f531c2d31b729afbf1c97a0d017526bf8e52a diff --git a/decoders/spi.py b/decoders/spi.py index 0ac8b56..e6a59bf 100644 --- a/decoders/spi.py +++ b/decoders/spi.py @@ -17,62 +17,56 @@ ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -class Sample(): - def __init__(self, data): - self.data = data - def probe(self, probe): - s = ord(self.data[probe / 8]) & (1 << (probe % 8)) - return True if s else False -def sampleiter(data, unitsize): - for i in range(0, len(data), unitsize): - yield(Sample(data[i:i+unitsize])) +import sigrokdecode as srd -class Decoder(): - name = 'SPI Decoder' +class Decoder(srd.Decoder): + id = 'spi' + name = 'SPI' + longname = 'Serial Peripheral Interface (SPI) bus' desc = '...desc...' - longname = '...longname...' longdesc = '...longdesc...' author = 'Gareth McMullin' email = 'gareth@blacksphere.co.nz' license = 'gplv2+' inputs = ['logic'] outputs = ['spi'] - # Probe names with a set of defaults - probes = {'sdata':0, 'sck':1} + probes = [ + {'id': 'sdata', 'name': 'DATA', 'desc': 'SPI data line (MISO or MOSI)'}, + {'id': 'sck', 'name': 'CLK', 'desc': 'SPI clock line'}, + ] options = {} + annotations = [] - def __init__(self, unitsize, **kwargs): - # Metadata comes in here, we don't care for now - #print kwargs - self.unitsize = unitsize - - self.probes = Decoder.probes.copy() - self.oldsck = True + def __init__(self): + self.oldsck = 1 self.rxcount = 0 self.rxdata = 0 self.bytesreceived = 0 + def start(self, metadata): + # self.out_proto = self.add(srd.OUTPUT_PROTO, 'spi') + self.out_ann = self.add(srd.OUTPUT_ANN, 'spi') + def report(self): - return "SPI: %d bytes received" % self.bytesreceived + return 'SPI: %d bytes received' % self.bytesreceived - def decode(self, data): - # We should accept a list of samples and iterate... - for sample in sampleiter(data["data"], self.unitsize): + def decode(self, timeoffset, duration, data): + # HACK! At the moment the number of probes is not handled correctly. + # E.g. if an input file (-i foo.sr) has more than two probes enabled. + for (samplenum, (sdata, sck, x, y, z, a)) in data: - sck = sample.probe(self.probes["sck"]) # Sample SDATA on rising SCK if sck == self.oldsck: continue self.oldsck = sck - if not sck: - continue + if not sck: + continue # If this is first bit, save timestamp if self.rxcount == 0: - self.time = data["time"] + self.time = timeoffset # FIXME # Receive bit into our shift register - sdata = sample.probe(self.probes["sdata"]) if sdata: self.rxdata |= 1 << (7 - self.rxcount) self.rxcount += 1 @@ -80,36 +74,17 @@ class Decoder(): if self.rxcount != 8: continue # Received a byte, pass up to sigrok - outdata = {"time":self.time, - "duration":data["time"] + data["duration"] - self.time, - "data":self.rxdata, - "display":("%02X" % self.rxdata), - "type":"spi", + outdata = {'time':self.time, + 'duration':timeoffset + duration - self.time, + 'data':self.rxdata, + 'display':('%02X' % self.rxdata), + 'type':'spi', } - sigrok.put(outdata) + # self.put(0, 0, self.out_proto, out_proto) + self.put(0, 0, self.out_ann, outdata) # Reset decoder state self.rxdata = 0 self.rxcount = 0 # Keep stats for summary self.bytesreceived += 1 - -if __name__ == "__main__": - data = open("spi_dump.bin").read() - - # dummy class to keep Decoder happy for test - class Sigrok(): - def put(self, data): - print "\t", data - sigrok = Sigrok() - - dec = Decoder(driver='ols', unitsize=1, starttime=0) - dec.decode({"time":0, "duration":len(data), "data":data, "type":"logic"}) - - print dec.summary() -else: - import sigrok - -#Tested with: -# sigrok-cli -d 0:samplerate=1000000:rle=on --time=1s -p 1,2 -a spidec -