X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fspi.py;h=6b5df8092fad5c566f3f19892468ba2d715dcc28;hp=9d3940e392d8ac6fd81be8e9236acd6eb42d0f72;hb=b1bb5eed4ad056f760bec83e784699dabbd72a18;hpb=d0e93c76e381eff58ca23949301f781b24ba4a8b diff --git a/decoders/spi.py b/decoders/spi.py index 9d3940e..6b5df80 100644 --- a/decoders/spi.py +++ b/decoders/spi.py @@ -23,8 +23,8 @@ import sigrokdecode as srd class Decoder(srd.Decoder): id = 'spi' name = 'SPI' - desc = '...desc...' longname = 'Serial Peripheral Interface (SPI) bus' + desc = '...desc...' longdesc = '...longdesc...' author = 'Gareth McMullin' email = 'gareth@blacksphere.co.nz' @@ -36,6 +36,9 @@ class Decoder(srd.Decoder): {'id': 'sck', 'name': 'CLK', 'desc': 'SPI clock line'}, ] options = {} + annotations = [ + ['TODO', 'TODO'], + ] def __init__(self): self.oldsck = 1 @@ -44,46 +47,47 @@ class Decoder(srd.Decoder): self.bytesreceived = 0 def start(self, metadata): - # self.out_proto = self.add(srd.SRD_OUTPUT_PROTO, 'spi') - self.out_ann = self.add(srd.SRD_OUTPUT_ANN, 'spi') + # self.out_proto = self.add(srd.OUTPUT_PROTO, 'spi') + self.out_ann = self.add(srd.OUTPUT_ANN, 'spi') def report(self): return 'SPI: %d bytes received' % self.bytesreceived - def decode(self, timeoffset, duration, data): + def decode(self, ss, es, data): # HACK! At the moment the number of probes is not handled correctly. # E.g. if an input file (-i foo.sr) has more than two probes enabled. - for (samplenum, (sdata, sck, x, y, z, a)) in data: + # for (samplenum, (sdata, sck, x, y, z, a)) in data: + # for (samplenum, (cs, miso, sck, mosi, wp, hold)) in data: + for (samplenum, (cs, miso, sck, sdata, wp, hold)) in data: - # Sample SDATA on rising SCK + # Sample SDATA on rising SCK. if sck == self.oldsck: continue self.oldsck = sck - if not sck: + if sck == 0: continue - # If this is first bit, save timestamp + # If this is the first bit, save timestamp. if self.rxcount == 0: - self.time = timeoffset # FIXME - # Receive bit into our shift register - if sdata: + self.time = samplenum + + # Receive bit into our shift register. + if sdata == 1: self.rxdata |= 1 << (7 - self.rxcount) + self.rxcount += 1 - # Continue to receive if not a byte yet + + # Continue to receive if not a byte yet. if self.rxcount != 8: continue - # Received a byte, pass up to sigrok - outdata = {'time':self.time, - 'duration':timeoffset + duration - self.time, - 'data':self.rxdata, - 'display':('%02X' % self.rxdata), - 'type':'spi', - } - # self.put(0, 0, self.out_proto, out_proto) - self.put(0, 0, self.out_ann, outdata) - # Reset decoder state + + # self.put(0, 0, self.out_proto, out_proto) # TODO + self.put(0, 0, self.out_ann, [0, ['0x%02x' % self.rxdata]]) + + # Reset decoder state. self.rxdata = 0 self.rxcount = 0 - # Keep stats for summary + + # Keep stats for summary. self.bytesreceived += 1