X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fspi.py;h=5903059268a406979405aea15cd03d14f0073b9e;hp=2c7445f9f427354444743095a6b1741625413572;hb=de9cee24cf52e42e51434ed542d4506c1fc0901b;hpb=c66baa8cbe1d5f0b6d6c4fb8cbe8ca05fcdf7763 diff --git a/decoders/spi.py b/decoders/spi.py index 2c7445f..5903059 100644 --- a/decoders/spi.py +++ b/decoders/spi.py @@ -18,13 +18,13 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -import sigrokdecode +import sigrokdecode as srd -class Decoder(sigrokdecode.Decoder): +class Decoder(srd.Decoder): id = 'spi' name = 'SPI' - desc = '...desc...' longname = 'Serial Peripheral Interface (SPI) bus' + desc = '...desc...' longdesc = '...longdesc...' author = 'Gareth McMullin' email = 'gareth@blacksphere.co.nz' @@ -32,60 +32,63 @@ class Decoder(sigrokdecode.Decoder): inputs = ['logic'] outputs = ['spi'] probes = [ - {'id': 'sdata', 'name': 'DATA', 'desc': 'SPI data line (MISO or MOSI)'}, + {'id': 'mosi', 'name': 'MOSI', + 'desc': 'SPI MOSI line (Master out, slave in)'}, {'id': 'sck', 'name': 'CLK', 'desc': 'SPI clock line'}, ] options = {} + annotations = [ + ['TODO', 'TODO'], + ] def __init__(self): self.oldsck = 1 - self.rxcount = 0 - self.rxdata = 0 + self.bitcount = 0 + self.mosidata = 0 self.bytesreceived = 0 - self.output_protocol = None - self.output_annotation = None def start(self, metadata): - # self.output_protocol = self.output_new(2) - self.output_annotation = self.output_new(1) + # self.out_proto = self.add(srd.OUTPUT_PROTO, 'spi') + self.out_ann = self.add(srd.OUTPUT_ANN, 'spi') def report(self): return 'SPI: %d bytes received' % self.bytesreceived - def decode(self, timeoffset, duration, data): + def decode(self, ss, es, data): # HACK! At the moment the number of probes is not handled correctly. # E.g. if an input file (-i foo.sr) has more than two probes enabled. - for (samplenum, (sdata, sck, x, y, z, a)) in data: + # for (samplenum, (mosi, sck, x, y, z, a)) in data: + # for (samplenum, (cs, miso, sck, mosi, wp, hold)) in data: + for (samplenum, (cs, miso, sck, mosi, wp, hold)) in data: - # Sample SDATA on rising SCK + # Sample data on rising SCK edges. if sck == self.oldsck: continue self.oldsck = sck - if not sck: + if sck == 0: continue - # If this is first bit, save timestamp - if self.rxcount == 0: - self.time = timeoffset # FIXME - # Receive bit into our shift register - if sdata: - self.rxdata |= 1 << (7 - self.rxcount) - self.rxcount += 1 - # Continue to receive if not a byte yet - if self.rxcount != 8: + # If this is the first bit, save timestamp. + if self.bitcount == 0: + self.time = samplenum + + # Receive bit into our shift register. + if mosi == 1: + self.mosidata |= 1 << (7 - self.bitcount) + + self.bitcount += 1 + + # Continue to receive if not a byte yet. + if self.bitcount != 8: continue - # Received a byte, pass up to sigrok - outdata = {'time':self.time, - 'duration':timeoffset + duration - self.time, - 'data':self.rxdata, - 'display':('%02X' % self.rxdata), - 'type':'spi', - } - # self.put(0, 0, self.output_protocol, out_proto) - self.put(0, 0, self.output_annotation, outdata) - # Reset decoder state - self.rxdata = 0 - self.rxcount = 0 - # Keep stats for summary + + # self.put(0, 0, self.out_proto, out_proto) # TODO + self.put(0, 0, self.out_ann, [0, ['0x%02x' % self.mosidata]]) + + # Reset decoder state. + self.mosidata = 0 + self.bitcount = 0 + + # Keep stats for summary. self.bytesreceived += 1