X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Frtc8564%2Fpd.py;h=b57fae645f8598f9c9ce67bd0d165f1c7873c24d;hp=41cff0d6ef5f8bea2d885589a3f7f034b9396439;hb=6cbba91f23b9f9ace75b4722c9c0776b9211008d;hpb=da9bcbd9f45b0153465c55ec726a0d76f6d7f01e

diff --git a/decoders/rtc8564/pd.py b/decoders/rtc8564/pd.py
index 41cff0d..b57fae6 100644
--- a/decoders/rtc8564/pd.py
+++ b/decoders/rtc8564/pd.py
@@ -14,15 +14,11 @@
 ## GNU General Public License for more details.
 ##
 ## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+## along with this program; if not, see <http://www.gnu.org/licenses/>.
 ##
 
 import sigrokdecode as srd
-
-# Return the specified BCD number (max. 8 bits) as integer.
-def bcd2int(b):
-    return (b & 0x0f) + ((b >> 4) * 10)
+from common.srdhelper import bcd2int
 
 def reg_list():
     l = []
@@ -32,19 +28,15 @@ def reg_list():
     return tuple(l)
 
 class Decoder(srd.Decoder):
-    api_version = 1
+    api_version = 3
     id = 'rtc8564'
     name = 'RTC-8564'
     longname = 'Epson RTC-8564 JE/NB'
     desc = 'Realtime clock module protocol.'
     license = 'gplv2+'
     inputs = ['i2c']
-    outputs = ['rtc8564']
-    optional_probes = (
-        {'id': 'clkout', 'name': 'CLKOUT', 'desc': 'Clock output'},
-        {'id': 'clkoe', 'name': 'CLKOE', 'desc': 'Clock output enable'},
-        {'id': 'int', 'name': 'INT#', 'desc': 'Interrupt'},
-    )
+    outputs = []
+    tags = ['Clock/timing']
     annotations = reg_list() + (
         ('read', 'Read date/time'),
         ('write', 'Write date/time'),
@@ -60,7 +52,10 @@ class Decoder(srd.Decoder):
         ('date-time', 'Date/time', (9, 10)),
     )
 
-    def __init__(self, **kwargs):
+    def __init__(self):
+        self.reset()
+
+    def reset(self):
         self.state = 'IDLE'
         self.hours = -1
         self.minutes = -1
@@ -72,7 +67,6 @@ class Decoder(srd.Decoder):
         self.bits = []
 
     def start(self):
-        # self.out_python = self.register(srd.OUTPUT_PYTHON)
         self.out_ann = self.register(srd.OUTPUT_ANN)
 
     def putx(self, data):
@@ -195,7 +189,7 @@ class Decoder(srd.Decoder):
             if cmd != 'START':
                 return
             self.state = 'GET SLAVE ADDR'
-            self.block_start_sample = ss
+            self.ss_block = ss
         elif self.state == 'GET SLAVE ADDR':
             # Wait for an address write operation.
             # TODO: We should only handle packets to the RTC slave (0xa2/0xa3).
@@ -226,7 +220,7 @@ class Decoder(srd.Decoder):
                 # TODO: Handle read/write of only parts of these items.
                 d = '%02d.%02d.%02d %02d:%02d:%02d' % (self.days, self.months,
                     self.years, self.hours, self.minutes, self.seconds)
-                self.put(self.block_start_sample, es, self.out_ann,
+                self.put(self.ss_block, es, self.out_ann,
                          [9, ['Write date/time: %s' % d, 'Write: %s' % d,
                               'W: %s' % d]])
                 self.state = 'IDLE'
@@ -252,12 +246,9 @@ class Decoder(srd.Decoder):
             elif cmd == 'STOP':
                 d = '%02d.%02d.%02d %02d:%02d:%02d' % (self.days, self.months,
                     self.years, self.hours, self.minutes, self.seconds)
-                self.put(self.block_start_sample, es, self.out_ann,
+                self.put(self.ss_block, es, self.out_ann,
                          [10, ['Read date/time: %s' % d, 'Read: %s' % d,
                                'R: %s' % d]])
                 self.state = 'IDLE'
             else:
                 pass # TODO?
-        else:
-            raise Exception('Invalid state: %s' % self.state)
-