X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fparallel%2Fpd.py;h=cafaefc071b4904718c84ab5e589bb695d005ea5;hp=9c203543f21a65593df2eea5b753dc1a1c32b6f4;hb=a573d3944c410d90adb5130323e0f3792d9ae201;hpb=be465111b552c7c2a2262ac49758a30a8bf1b1d5 diff --git a/decoders/parallel/pd.py b/decoders/parallel/pd.py index 9c20354..cafaefc 100644 --- a/decoders/parallel/pd.py +++ b/decoders/parallel/pd.py @@ -18,12 +18,10 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# Parallel (sync) bus protocol decoder - import sigrokdecode as srd ''' -Protocol output format: +OUTPUT_PYTHON format: Packet: [, ] @@ -56,15 +54,18 @@ Packet: word is 7, and so on. ''' -def probe_list(num_probes): - l = [] - for i in range(num_probes): +def channel_list(num_channels): + l = [{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}] + for i in range(num_channels): d = {'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data line %d' % i} l.append(d) - return l + return tuple(l) + +class ChannelError(Exception): + pass class Decoder(srd.Decoder): - api_version = 1 + api_version = 2 id = 'parallel' name = 'Parallel' longname = 'Parallel sync bus' @@ -72,20 +73,18 @@ class Decoder(srd.Decoder): license = 'gplv2+' inputs = ['logic'] outputs = ['parallel'] - probes = [ - {'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}, - ] - optional_probes = probe_list(8) - options = { - 'clock_edge': ['Clock edge to sample on', 'rising'], - 'wordsize': ['Word size of the data', 1], - 'endianness': ['Endianness of the data', 'little'], - 'format': ['Data format', 'hex'], - } - annotations = [ - ['items', 'Items'], - ['words', 'Words'], - ] + optional_channels = channel_list(8) + options = ( + {'id': 'clock_edge', 'desc': 'Clock edge to sample on', + 'default': 'rising', 'values': ('rising', 'falling')}, + {'id': 'wordsize', 'desc': 'Data wordsize', 'default': 1}, + {'id': 'endianness', 'desc': 'Data endianness', + 'default': 'little', 'values': ('little', 'big')}, + ) + annotations = ( + ('items', 'Items'), + ('words', 'Words'), + ) def __init__(self): self.oldclk = None @@ -96,23 +95,19 @@ class Decoder(srd.Decoder): self.oldpins = None self.ss_item = self.es_item = None self.first = True - self.state = 'IDLE' - def start(self, metadata): - self.out_proto = self.register(srd.OUTPUT_PYTHON) + def start(self): + self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) - def report(self): - pass - def putpb(self, data): - self.put(self.ss_item, self.es_item, self.out_proto, data) + self.put(self.ss_item, self.es_item, self.out_python, data) def putb(self, data): self.put(self.ss_item, self.es_item, self.out_ann, data) def putpw(self, data): - self.put(self.ss_word, self.es_word, self.out_proto, data) + self.put(self.ss_word, self.es_word, self.out_python, data) def putw(self, data): self.put(self.ss_word, self.es_word, self.out_ann, data) @@ -130,7 +125,7 @@ class Decoder(srd.Decoder): self.items.append(item) self.itemcount += 1 - if self.first == True: + if self.first: # Save the start sample and item for later (no output yet). self.ss_item = self.samplenum self.first = False @@ -149,7 +144,7 @@ class Decoder(srd.Decoder): if self.itemcount < ws: return - # Output annotations/proto for a word (a collection of items). + # Output annotations/python for a word (a collection of items). word = 0 for i in range(ws): if endian == 'little': @@ -188,9 +183,10 @@ class Decoder(srd.Decoder): continue self.oldpins = pins - # State machine. - if self.state == 'IDLE': - self.find_clk_edge(pins[0], pins[1:]) - else: - raise Exception('Invalid state: %s' % self.state) + if sum(1 for p in pins if p in (0, 1)) == 0: + raise ChannelError('At least one channel has to be supplied.') + if pins[0] not in (0, 1): + self.handle_bits(pins[1:]) + else: + self.find_clk_edge(pins[0], pins[1:])