X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fparallel%2F__init__.py;h=100523ec1464be87babf055d48be212372e38ca8;hp=a338c43ae4bf01c0c78e8575870f57a2d0e82344;hb=4539e9ca58966ce3c9cad4801b16c315e86ace01;hpb=25e1418afe855a77be29bca4350dc49220dd3143

diff --git a/decoders/parallel/__init__.py b/decoders/parallel/__init__.py
index a338c43..100523e 100644
--- a/decoders/parallel/__init__.py
+++ b/decoders/parallel/__init__.py
@@ -14,19 +14,21 @@
 ## GNU General Public License for more details.
 ##
 ## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+## along with this program; if not, see <http://www.gnu.org/licenses/>.
 ##
 
 '''
 This protocol decoder can decode synchronous parallel buses with various
-number of data bits/probes and one clock line.
+number of data bits/channels and one (optional) clock line.
 
-It is required to use the lowest data probes, and use consecutive ones.
-For example, for a 4-bit sync parallel bus, probes D0/D1/D2/D3 (and CLK)
+If no clock line is supplied, the decoder works slightly differently in
+that it interprets every transition on any of the supplied data channels
+like there had been a clock transition.
+
+It is required to use the lowest data channels, and use consecutive ones.
+For example, for a 4-bit sync parallel bus, channels D0/D1/D2/D3 (and CLK)
 should be used. Using combinations like D7/D12/D3/D15 is not supported.
 For an 8-bit bus you should use D0-D7, for a 16-bit bus use D0-D15 and so on.
 '''
 
-from .pd import *
-
+from .pd import Decoder