X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fnunchuk%2Fnunchuk.py;h=a3fdf779d7b83d51e4d4d55c4193db19c5f32e24;hp=f59fced0e70a26ad4c15c2e0ac56b70ebe0eeea4;hb=d628cdb521159d600cb19a3cd04eec28e07d9220;hpb=5ea8b024da82871d4054356f8a645c8d61bbcd47 diff --git a/decoders/nunchuk/nunchuk.py b/decoders/nunchuk/nunchuk.py index f59fced..a3fdf77 100644 --- a/decoders/nunchuk/nunchuk.py +++ b/decoders/nunchuk/nunchuk.py @@ -41,7 +41,7 @@ class Decoder(srd.Decoder): def __init__(self, **kwargs): self.state = 'IDLE' - self.sx = self.sy = self.ax = self.ay = self.az = self.bz = self.bc = 0 + self.sx = self.sy = self.ax = self.ay = self.az = self.bz = self.bc = -1 self.databytecount = 0 self.reg = 0x00 @@ -52,35 +52,34 @@ class Decoder(srd.Decoder): def report(self): pass + def putx(self, data): + # Helper for annotations which span exactly one I2C packet. + self.put(self.ss, self.es, self.out_ann, data) + def handle_reg_0x00(self, databyte): self.sx = databyte - self.put(0, 0, self.out_ann, - [0, ['Analog stick X position: 0x%02x' % self.sx]]) - self.put(0, 0, self.out_ann, [1, ['SX: 0x%02x' % self.sx]]) + self.putx([0, ['Analog stick X position: 0x%02x' % self.sx]]) + self.putx([1, ['SX: 0x%02x' % self.sx]]) def handle_reg_0x01(self, databyte): self.sy = databyte - self.put(0, 0, self.out_ann, - [0, ['Analog stick Y position: 0x%02x' % self.sy]]) - self.put(0, 0, self.out_ann, [1, ['SY: 0x%02x' % self.sy]]) + self.putx([0, ['Analog stick Y position: 0x%02x' % self.sy]]) + self.putx([1, ['SY: 0x%02x' % self.sy]]) def handle_reg_0x02(self, databyte): self.ax = databyte << 2 - self.put(0, 0, self.out_ann, - [0, ['Accelerometer X value bits[9:2]: 0x%03x' % self.ax]]) - self.put(0, 0, self.out_ann, [1, ['AX[9:2]: 0x%03x' % self.ax]]) + self.putx([0, ['Accelerometer X value bits[9:2]: 0x%03x' % self.ax]]) + self.putx([1, ['AX[9:2]: 0x%03x' % self.ax]]) def handle_reg_0x03(self, databyte): self.ay = databyte << 2 - self.put(0, 0, self.out_ann, - [0, ['Accelerometer Y value bits[9:2]: 0x%03x' % self.ay]]) - self.put(0, 0, self.out_ann, [1, ['AY[9:2]: 0x%x' % self.ay]]) + self.putx([0, ['Accelerometer Y value bits[9:2]: 0x%03x' % self.ay]]) + self.putx([1, ['AY[9:2]: 0x%x' % self.ay]]) def handle_reg_0x04(self, databyte): self.az = databyte << 2 - self.put(0, 0, self.out_ann, - [0, ['Accelerometer Z value bits[9:2]: 0x%03x' % self.az]]) - self.put(0, 0, self.out_ann, [1, ['AZ[9:2]: 0x%x' % self.az]]) + self.putx([0, ['Accelerometer Z value bits[9:2]: 0x%03x' % self.az]]) + self.putx([1, ['AZ[9:2]: 0x%x' % self.az]]) # TODO: Bit-exact annotations. def handle_reg_0x05(self, databyte): @@ -94,24 +93,43 @@ class Decoder(srd.Decoder): self.az |= az_rest s = '' if (self.bz == 0) else 'not ' - self.put(0, 0, self.out_ann, [0, ['Z button: %spressed' % s]]) - self.put(0, 0, self.out_ann, [1, ['BZ: %d' % self.bz]]) + self.putx([0, ['Z button: %spressed' % s]]) + self.putx([1, ['BZ: %d' % self.bz]]) s = '' if (self.bc == 0) else 'not ' - self.put(0, 0, self.out_ann, [0, ['C button: %spressed' % s]]) - self.put(0, 0, self.out_ann, [1, ['BC: %d' % self.bc]]) - - self.put(0, 0, self.out_ann, - [0, ['Accelerometer X value bits[1:0]: 0x%03x' % ax_rest]]) - self.put(0, 0, self.out_ann, [1, ['AX[1:0]: 0x%x' % ax_rest]]) - - self.put(0, 0, self.out_ann, - [0, ['Accelerometer Y value bits[1:0]: 0x%03x' % ay_rest]]) - self.put(0, 0, self.out_ann, [1, ['AY[1:0]: 0x%x' % ay_rest]]) - - self.put(0, 0, self.out_ann, - [0, ['Accelerometer Z value bits[1:0]: 0x%03x' % az_rest]]) - self.put(0, 0, self.out_ann, [1, ['AZ[1:0]: 0x%x' % az_rest]]) + self.putx([0, ['C button: %spressed' % s]]) + self.putx([1, ['BC: %d' % self.bc]]) + + self.putx([0, ['Accelerometer X value bits[1:0]: 0x%x' % ax_rest]]) + self.putx([1, ['AX[1:0]: 0x%x' % ax_rest]]) + + self.putx([0, ['Accelerometer Y value bits[1:0]: 0x%x' % ay_rest]]) + self.putx([1, ['AY[1:0]: 0x%x' % ay_rest]]) + + self.putx([0, ['Accelerometer Z value bits[1:0]: 0x%x' % az_rest]]) + self.putx([1, ['AZ[1:0]: 0x%x' % az_rest]]) + + def output_full_block_if_possible(self): + # For now, only output summary annotation if all values are available. + t = (self.sx, self.sy, self.ax, self.ay, self.az, self.bz, self.bc) + if -1 in t: + return + + s = 'Analog stick X position: 0x%02x\n' % self.sx + s += 'Analog stick Y position: 0x%02x\n' % self.sy + s += 'Z button: %spressed\n' % ('' if (self.bz == 0) else 'not ') + s += 'C button: %spressed\n' % ('' if (self.bc == 0) else 'not ') + s += 'Accelerometer X value: 0x%03x\n' % self.ax + s += 'Accelerometer Y value: 0x%03x\n' % self.ay + s += 'Accelerometer Z value: 0x%03x\n' % self.az + self.put(self.block_start_sample, self.block_end_sample, + self.out_ann, [0, [s]]) + + s = 'SX = 0x%02x, SY = 0x%02x, AX = 0x%02x, AY = 0x%02x, ' \ + 'AZ = 0x%02x, BZ = 0x%02x, BC = 0x%02x' % (self.sx, \ + self.sy, self.ax, self.ay, self.az, self.bz, self.bc) + self.put(self.block_start_sample, self.block_end_sample, + self.out_ann, [1, [s]]) def decode(self, ss, es, data): cmd, databyte = data @@ -138,21 +156,12 @@ class Decoder(srd.Decoder): self.reg += 1 elif cmd == 'STOP': self.block_end_sample = es - - # TODO: Only works if host reads _all_ regs (0x00 - 0x05). - d = 'SX = 0x%02x, SY = 0x%02x, AX = 0x%02x, AY = 0x%02x, ' \ - 'AZ = 0x%02x, BZ = 0x%02x, BC = 0x%02x' % (self.sx, \ - self.sy, self.ax, self.ay, self.az, self.bz, self.bc) - self.put(self.block_start_sample, self.block_end_sample, - self.out_ann, [0, [d]]) - - self.sx = self.sy = self.ax = self.ay = self.az = 0 - self.bz = self.bc = 0 - + self.output_full_block_if_possible() + self.sx = self.sy = self.ax = self.ay = self.az = -1 + self.bz = self.bc = -1 self.state = 'IDLE' else: - # self.put(0, 0, self.out_ann, - # [0, ['Ignoring: %s (data=%s)' % (cmd, databyte)]]) + # self.putx([0, ['Ignoring: %s (data=%s)' % (cmd, databyte)]]) pass else: raise Exception('Invalid state: %s' % self.state)