X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fmxc6225xu%2Fpd.py;h=39e73f7f1c70cfe6bd75e1fa4c01800d4ece2544;hp=c139918d0654ab6d226ef783328853d648b15f47;hb=4539e9ca58966ce3c9cad4801b16c315e86ace01;hpb=0eeeb544e1ea3cef9669f98e7c0b19b8f73a9236

diff --git a/decoders/mxc6225xu/pd.py b/decoders/mxc6225xu/pd.py
index c139918..39e73f7 100644
--- a/decoders/mxc6225xu/pd.py
+++ b/decoders/mxc6225xu/pd.py
@@ -1,5 +1,5 @@
 ##
-## This file is part of the sigrok project.
+## This file is part of the libsigrokdecode project.
 ##
 ## Copyright (C) 2012 Uwe Hermann <uwe@hermann-uwe.de>
 ##
@@ -14,12 +14,9 @@
 ## GNU General Public License for more details.
 ##
 ## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+## along with this program; if not, see <http://www.gnu.org/licenses/>.
 ##
 
-# MEMSIC MXC6225XU protocol decoder
-
 import sigrokdecode as srd
 
 # Definitions of various bits in MXC6225XU registers.
@@ -62,7 +59,7 @@ status = {
 }
 
 class Decoder(srd.Decoder):
-    api_version = 1
+    api_version = 2
     id = 'mxc6225xu'
     name = 'MXC6225XU'
     longname = 'MEMSIC MXC6225XU'
@@ -70,24 +67,15 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['i2c']
     outputs = ['mxc6225xu']
-    probes = []
-    optional_probes = [
-        {'id': 'int', 'name': 'INT', 'desc': 'DTOS interrupt output pin'},
-    ]
-    options = {}
-    annotations = [
-        ['Text', 'Human-readable text'],
-    ]
-
-    def __init__(self, **kwargs):
-        self.state = 'IDLE'
+    annotations = (
+        ('text', 'Human-readable text'),
+    )
 
-    def start(self, metadata):
-        # self.out_proto = self.add(srd.OUTPUT_PROTO, 'mxc6225xu')
-        self.out_ann = self.add(srd.OUTPUT_ANN, 'mxc6225xu')
+    def __init__(self):
+        self.state = 'IDLE'
 
-    def report(self):
-        pass
+    def start(self):
+        self.out_ann = self.register(srd.OUTPUT_ANN)
 
     def putx(self, data):
         self.put(self.ss, self.es, self.out_ann, data)
@@ -108,7 +96,7 @@ class Decoder(srd.Decoder):
         # Bits[7:7]: INT
         int_val = (b >> 7) & 1
         s = 'unchanged and no' if (int_val == 0) else 'changed or'
-        ann = 'INT = %d: Orientation %s shake event occured\n' % (int_val, s)
+        ann = 'INT = %d: Orientation %s shake event occurred\n' % (int_val, s)
 
         # Bits[6:5]: SH[1:0]
         sh = (((b >> 6) & 1) << 1) | ((b >> 5) & 1)
@@ -167,16 +155,15 @@ class Decoder(srd.Decoder):
     def decode(self, ss, es, data):
         cmd, databyte = data
 
-        # Store the start/end samples of this I2C packet.
+        # Store the start/end samples of this I²C packet.
         self.ss, self.es = ss, es
 
         # State machine.
         if self.state == 'IDLE':
-            # Wait for an I2C START condition.
+            # Wait for an I²C START condition.
             if cmd != 'START':
                 return
             self.state = 'GET SLAVE ADDR'
-            self.block_start_sample = ss
         elif self.state == 'GET SLAVE ADDR':
             # Wait for an address write operation.
             # TODO: We should only handle packets to the slave(?)
@@ -224,6 +211,3 @@ class Decoder(srd.Decoder):
                 self.state = 'IDLE'
             else:
                 pass # TODO?
-        else:
-            raise Exception('Invalid state: %s' % self.state)
-