X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fmx25lxx05d%2Fmx25lxx05d.py;h=cb5472868f5606aa706b85b33ccc2dd552c15747;hp=61ec185fc184597e70d11b39a7922c7d2280e7f9;hb=e4022299ba10e4ce4133da48932da695af4b9c99;hpb=385508e9b12d87519f9144a67e7682b46a592200;ds=sidebyside diff --git a/decoders/mx25lxx05d/mx25lxx05d.py b/decoders/mx25lxx05d/mx25lxx05d.py index 61ec185..cb54728 100644 --- a/decoders/mx25lxx05d/mx25lxx05d.py +++ b/decoders/mx25lxx05d/mx25lxx05d.py @@ -18,17 +18,9 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# -# Macronix MX25Lxx05D SPI (NOR) flash chip decoder. -# Works for MX25L1605D/MX25L3205D/MX25L6405D. -# - -# -# TODO: Description -# -# Details: -# http://www.macronix.com/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/3F21BAC2E121E17848257639003A3146/$File/MX25L1605D-3205D-6405D-1.5.pdf -# +# Macronix MX25Lxx05D SPI (NOR) flash chip protocol decoder + +# Note: Works for MX25L1605D/MX25L3205D/MX25L6405D. import sigrokdecode as srd @@ -106,24 +98,25 @@ class Decoder(srd.Decoder): id = 'mx25lxx05d' name = 'MX25Lxx05D' longname = 'Macronix MX25Lxx05D' - desc = 'Macronix MX25Lxx05D SPI flash chip decoder' - longdesc = 'TODO' + desc = 'SPI (NOR) flash chip protocol.' license = 'gplv2+' inputs = ['spi', 'logic'] outputs = ['mx25lxx05d'] probes = [] - extra_probes = [ + optional_probes = [ {'id': 'hold', 'name': 'HOLD#', 'desc': 'TODO.'}, {'id': 'wp_acc', 'name': 'WP#/ACC', 'desc': 'TODO.'}, ] options = {} # TODO annotations = [ - ['TODO', 'TODO'], + ['Text', 'Human-readable text'], ] def __init__(self, **kwargs): self.state = IDLE self.cmdstate = 1 # TODO + self.addr = 0 + self.data = [] def start(self, metadata): # self.out_proto = self.add(srd.OUTPUT_PROTO, 'mx25lxx05d') @@ -133,7 +126,7 @@ class Decoder(srd.Decoder): pass def putx(self, data): - # Simplification, most annotations span extactly one SPI byte/packet. + # Simplification, most annotations span exactly one SPI byte/packet. self.put(self.ss, self.es, self.out_ann, data) def handle_wren(self, mosi, miso): @@ -218,7 +211,7 @@ class Decoder(srd.Decoder): self.putx([0, ['%s ID' % d]]) elif self.cmdstate == 6: # Byte 6: Slave sends device ID (or manufacturer ID). - self.ids += [miso] + self.ids.append(miso) d = 'Manufacturer' if self.manufacturer_id_first else 'Device' self.putx([0, ['%s ID' % d]]) else: @@ -234,19 +227,77 @@ class Decoder(srd.Decoder): self.cmdstate += 1 def handle_rdsr(self, mosi, miso): - self.putx([0, ['Command: %s (0x%02x)' % (cmds[self.cmd], miso)]]) - self.state = IDLE + # Read status register: Master asserts CS#, sends RDSR command, + # reads status register byte. If CS# is kept asserted, the status + # register can be read continuously / multiple times in a row. + # When done, the master de-asserts CS# again. + if self.cmdstate == 1: + # Byte 1: Master sends command ID. + self.putx([0, ['Command: %s' % cmds[self.cmd]]]) + elif self.cmdstate >= 2: + # Bytes 2-x: Slave sends status register as long as master clocks. + if self.cmdstate <= 3: # TODO: While CS# asserted. + self.putx([0, ['Status register: 0x%02x' % miso]]) + # TODO: Decode status register bits. + + if self.cmdstate == 3: # TODO: If CS# got de-asserted. + self.state = IDLE + return + + self.cmdstate += 1 + + def handle_pp(self, mosi, miso): + # Page program: Master asserts CS#, sends PP command, sends 3-byte + # page address, sends >= 1 data bytes, de-asserts CS#. + if self.cmdstate == 1: + # Byte 1: Master sends command ID. + self.putx([0, ['Command: %s' % cmds[self.cmd]]]) + elif self.cmdstate in (2, 3, 4): + # Bytes 2/3/4: Master sends page address (24bits, MSB-first). + self.addr |= (mosi << ((4 - self.cmdstate) * 8)) + # self.putx([0, ['Page address, byte %d: 0x%02x' % \ + # (4 - self.cmdstate, mosi)]]) + if self.cmdstate == 4: + self.putx([0, ['Page address: 0x%06x' % self.addr]]) + self.addr = 0 + elif self.cmdstate >= 5: + # Bytes 5-x: Master sends data bytes (until CS# de-asserted). + # TODO: For now we hardcode 256 bytes per page / PP command. + if self.cmdstate <= 256 + 4: # TODO: While CS# asserted. + self.data.append(mosi) + # self.putx([0, ['New data byte: 0x%02x' % mosi]]) + + if self.cmdstate == 256 + 4: # TODO: If CS# got de-asserted. + # s = ', '.join(map(hex, self.data)) + s = ''.join(map(chr, self.data)) + self.putx([0, ['Page data: %s' % s]]) + self.data = [] + self.state = IDLE + return + + self.cmdstate += 1 def decode(self, ss, es, data): ptype, mosi, miso = data - if ptype != 'data': + # if ptype == 'DATA': + # s = 'MOSI: 0x%02x, MISO: 0x%02x' % (mosi, miso) + # self.put(0, 0, self.out_ann, [0, [s]]) + # pass + + # if ptype == 'CS-CHANGE': + # if mosi == 1 and miso == 0: + # self.put(0, 0, self.out_ann, [0, ['Asserting CS#']]) + # elif mosi == 0 and miso == 1: + # self.put(0, 0, self.out_ann, [0, ['De-asserting CS#']]) + # return + + if ptype != 'DATA': return cmd = mosi - self.ss = ss - self.es = es + self.ss, self.es = ss, es # If we encountered a known chip command, enter the resp. state. if self.state == IDLE: @@ -256,8 +307,6 @@ class Decoder(srd.Decoder): self.cmdstate = 1 else: pass # TODO - else: - pass # Handle commands. # TODO: Use some generic way to invoke the resp. method. @@ -267,10 +316,12 @@ class Decoder(srd.Decoder): self.handle_se(mosi, miso) elif self.state == CMD_RDID: self.handle_rdid(mosi, miso) - if self.state == CMD_REMS: + elif self.state == CMD_REMS: self.handle_rems(mosi, miso) - if self.state == CMD_RDSR: + elif self.state == CMD_RDSR: self.handle_rdsr(mosi, miso) + elif self.state == CMD_PP: + self.handle_pp(mosi, miso) else: self.put(0, 0, self.out_ann, [0, ['Unknown command: 0x%02x' % cmd]]) self.state = IDLE