X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fmdio%2Fpd.py;h=25229129516c748548539b0775efa455af441a47;hp=873079ab879eeb86508bc4f43b5672bc9250edd0;hb=389d21d222a503b9f5f43404ced4b10813008b3a;hpb=30d775b095a4b76e5fa755b19d5521affa3c053c diff --git a/decoders/mdio/pd.py b/decoders/mdio/pd.py index 873079a..2522912 100644 --- a/decoders/mdio/pd.py +++ b/decoders/mdio/pd.py @@ -29,7 +29,7 @@ import sigrokdecode as srd class Decoder(srd.Decoder): - api_version = 2 + api_version = 3 id = 'mdio' name = 'MDIO' longname = 'Management Data Input/Output' @@ -62,7 +62,9 @@ class Decoder(srd.Decoder): ) def __init__(self): - self.last_mdc = 1 + self.reset() + + def reset(self): self.illegal_bus = 0 self.samplenum = -1 self.clause45_addr = -1 # Clause 45 is context sensitive. @@ -93,7 +95,7 @@ class Decoder(srd.Decoder): if self.clause45 and self.clause45_addr != -1: decoded_min += str.format('ADDR: %04X ' % self.clause45_addr) elif self.clause45: - decoded_min += str.format('ADDR: UKWN ' % self.clause45_addr) + decoded_min += str.format('ADDR: UKWN ') if self.clause45 and self.opcode > 1 \ or (not self.clause45 and self.opcode): @@ -273,10 +275,9 @@ class Decoder(srd.Decoder): def state_DATA(self, mdio): if self.data == -1: self.data = 0 - self.putff([2, ['TURNAROUND', 'TA', 'T']]) + self.putff([2, ['TA', 'T']]) if self.ta_invalid: - self.putff([4, ['TURNAROUND%s' % self.ta_invalid, - 'TA%s' % self.ta_invalid, 'TA', 'T']]) + self.putff([4, ['TA%s' % self.ta_invalid, 'TA', 'T']]) self.ss_frame_field = self.samplenum self.data_bits -= 1 self.data |= mdio << self.data_bits @@ -317,14 +318,8 @@ class Decoder(srd.Decoder): self.process_state(self.state, mdio) - def decode(self, ss, es, data): - for (self.samplenum, pins) in data: - # Ignore identical samples early on (for performance reasons). - if self.last_mdc == pins[0]: - continue - self.last_mdc = pins[0] - if pins[0] == 0: # Check for rising edge. - continue - - # Found the correct clock edge, now get/handle the bit(s). + def decode(self): + while True: + # Process pin state upon rising MDC edge. + pins = self.wait({0: 'r'}) self.handle_bit(pins[1])