X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fjtag_stm32%2Fpd.py;h=ff5bb770666090a60d5f322b03e81379f2434209;hp=5f5c2347e60798573f0a43c024299eec1e4597bd;hb=92b7b49f6964f57a7d6fc4473645c993cfa4ba52;hpb=0edb5d58301af36844681f6427b06040678f63d0 diff --git a/decoders/jtag_stm32/pd.py b/decoders/jtag_stm32/pd.py index 5f5c234..ff5bb77 100644 --- a/decoders/jtag_stm32/pd.py +++ b/decoders/jtag_stm32/pd.py @@ -35,6 +35,23 @@ ir = { # ARM Cortex-M3 r1p1-01rel0 ID code cm3_idcode = 0x3ba00477 +# http://infocenter.arm.com/help/topic/com.arm.doc.ddi0413c/Chdjibcg.html +cm3_idcode_ver = { + 0x3: 'JTAG-DP', + 0x2: 'SW-DP', +} +cm3_idcode_part = { + 0xba00: 'JTAG-DP', + 0xba10: 'SW-DP', +} + +# http://infocenter.arm.com/help/topic/com.arm.doc.faqs/ka14408.html +jedec_id = { + 5: { + 0x3b: 'ARM Ltd.', + }, +} + # JTAG ID code in the STM32F10xxx BSC (boundary scan) TAP jtag_idcode = { 0x06412041: 'Low-density device, rev. A', @@ -81,16 +98,16 @@ apb_ap_reg = { # Bits[27:12]: Part number (here: 0xba00) # JTAG-DP: 0xba00, SW-DP: 0xba10 # Bits[11:1]: JEDEC (JEP-106) manufacturer ID (here: 0x23b) -# Bits[11:8]: Continuation code ('ARM Limited': 0x04) -# Bits[7:1]: Identity code ('ARM Limited': 0x3b) +# Bits[11:8]: Continuation code ('ARM Ltd.': 0x04) +# Bits[7:1]: Identity code ('ARM Ltd.': 0x3b) # Bits[0:0]: Reserved (here: 0x1) def decode_device_id_code(bits): id_hex = '0x%x' % int('0b' + bits, 2) - ver = '0x%x' % int('0b' + bits[-32:-28], 2) - part = '0x%x' % int('0b' + bits[-28:-12], 2) - manuf = '0x%x' % int('0b' + bits[-12:-1], 2) - res = '0x%x' % int('0b' + bits[-1], 2) - return (id_hex, ver, part, manuf, res) + ver = cm3_idcode_ver.get(int('0b' + bits[-32:-28], 2), 'UNKNOWN') + part = cm3_idcode_part.get(int('0b' + bits[-28:-12], 2), 'UNKNOWN') + ids = jedec_id.get(int('0b' + bits[-12:-8], 2) + 1, {}) + manuf = ids.get(int('0b' + bits[-7:-1], 2), 'UNKNOWN') + return (id_hex, manuf, ver, part) # DPACC is used to access debug port registers (CTRL/STAT, SELECT, RDBUFF). # APACC is used to access all Access Port (AHB-AP) registers. @@ -127,10 +144,19 @@ class Decoder(srd.Decoder): inputs = ['jtag'] outputs = ['jtag_stm32'] annotations = ( - ('text', 'Human-readable text'), + ('item', 'Item'), + ('field', 'Field'), + ('command', 'Command'), + ('warning', 'Warning'), + ) + annotation_rows = ( + ('items', 'Items', (0,)), + ('fields', 'Fields', (1,)), + ('commands', 'Commands', (2,)), + ('warnings', 'Warnings', (3,)), ) - def __init__(self, **kwargs): + def __init__(self): self.state = 'IDLE' self.samplenums = None @@ -140,35 +166,56 @@ class Decoder(srd.Decoder): def putx(self, data): self.put(self.ss, self.es, self.out_ann, data) + def putf(self, s, e, data): + self.put(self.samplenums[s][0], self.samplenums[e][1], self.out_ann, data) + def handle_reg_bypass(self, cmd, bits): self.putx([0, ['BYPASS: ' + bits]]) def handle_reg_idcode(self, cmd, bits): # IDCODE is a read-only register which is always accessible. - # IR == IDCODE: The device ID code is shifted out via DR next. - self.putx([0, ['IDCODE: %s (ver=%s, part=%s, manuf=%s, res=%s)' % \ - decode_device_id_code(bits)]]) + # IR == IDCODE: The 32bit device ID code is shifted out via DR next. + + id_hex, manuf, ver, part = decode_device_id_code(bits[:-1]) + cc = '0x%x' % int('0b' + bits[:-1][-12:-8], 2) + ic = '0x%x' % int('0b' + bits[:-1][-7:-1], 2) + + self.putf(0, 0, [1, ['Reserved (BS TAP)', 'BS', 'B']]) + self.putf(1, 1, [1, ['Reserved', 'Res', 'R']]) + self.putf(9, 12, [0, ['Continuation code: %s' % cc, 'CC', 'C']]) + self.putf(2, 8, [0, ['Identity code: %s' % ic, 'IC', 'I']]) + self.putf(2, 12, [1, ['Manufacturer: %s' % manuf, 'Manuf', 'M']]) + self.putf(13, 28, [1, ['Part: %s' % part, 'Part', 'P']]) + self.putf(29, 32, [1, ['Version: %s' % ver, 'Version', 'V']]) + + self.ss = self.samplenums[1][0] + self.putx([2, ['IDCODE: %s (%s: %s/%s)' % \ + decode_device_id_code(bits[:-1])]]) def handle_reg_dpacc(self, cmd, bits): + bits = bits[:-1] s = data_in('DPACC', bits) if (cmd == 'DR TDI') else data_out(bits) - self.putx([0, [s]]) + self.putx([2, [s]]) def handle_reg_apacc(self, cmd, bits): + bits = bits[:-1] s = data_in('APACC', bits) if (cmd == 'DR TDI') else data_out(bits) - self.putx([0, [s]]) + self.putx([2, [s]]) def handle_reg_abort(self, cmd, bits): + bits = bits[:-1] # Bits[31:1]: reserved. Bit[0]: DAPABORT. a = '' if (bits[0] == '1') else 'No ' s = 'DAPABORT = %s: %sDAP abort generated' % (bits[0], a) - self.putx([0, [s]]) + self.putx([2, [s]]) # Warn if DAPABORT[31:1] contains non-zero bits. if (bits[:-1] != ('0' * 31)): - self.putx([0, ['WARNING: DAPABORT[31:1] reserved!']]) + self.putx([3, ['WARNING: DAPABORT[31:1] reserved!']]) def handle_reg_unknown(self, cmd, bits): - self.putx([0, ['Unknown instruction: %s' % bits]]) + bits = bits[:-1] + self.putx([2, ['Unknown instruction: %s' % bits]]) def decode(self, ss, es, data): cmd, val = data @@ -176,15 +223,9 @@ class Decoder(srd.Decoder): self.ss, self.es = ss, es if cmd != 'NEW STATE': - val, self.samplenums = val - # The right-most char in the 'val' bitstring is the LSB. - - # The STM32F10xxx has two serially connected JTAG TAPs, the - # boundary scan tap (5 bits) and the Cortex-M3 TAP (4 bits). - # See UM 31.5 "STM32F10xxx JTAG TAP connection" for details. - # Due to this, we need to ignore the last bit of each data shift. - val = val[:-1] + val, self.samplenums = val + self.samplenums.reverse() # State machine if self.state == 'IDLE': @@ -195,9 +236,12 @@ class Decoder(srd.Decoder): # The STM32F10xxx has two serially connected JTAG TAPs, the # boundary scan tap (5 bits) and the Cortex-M3 TAP (4 bits). # See UM 31.5 "STM32F10xxx JTAG TAP connection" for details. - # Currently we only care about the latter and use IR[3:0]. - self.state = ir.get(val[-4:], ['UNKNOWN', 0])[0] - self.putx([0, ['IR: ' + self.state]]) + self.state = ir.get(val[:-1][-4:], ['UNKNOWN', 0])[0] + bstap_ir = ir.get(val[:-1][:4], ['UNKNOWN', 0])[0] + self.putf(5, 8, [1, ['IR (BS TAP): ' + bstap_ir]]) + self.putf(1, 4, [1, ['IR (M3 TAP): ' + self.state]]) + self.putf(0, 0, [1, ['Reserved (BS TAP)', 'BS', 'B']]) + self.putx([2, ['IR: %s' % self.state]]) elif self.state == 'BYPASS': # Here we're interested in incoming bits (TDI). if cmd != 'DR TDI':