X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fjtag_ejtag%2Fpd.py;h=5f026fa86b9e5dbfc28e01d426fb66a1af8c6e19;hp=ceaa1142dd6f02bda715b30823bbe800a5b5564e;hb=4c180223a8ae12feb7bc3601e07e848fb9cdb493;hpb=f78b814d54b19233d5e3f7cfef3d30a7a5ac8d40

diff --git a/decoders/jtag_ejtag/pd.py b/decoders/jtag_ejtag/pd.py
index ceaa114..5f026fa 100644
--- a/decoders/jtag_ejtag/pd.py
+++ b/decoders/jtag_ejtag/pd.py
@@ -197,6 +197,7 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['jtag']
     outputs = ['jtag_ejtag']
+    tags = ['Logic', 'MCU Debugging', 'Bus']
     annotations = (
         ('instruction', 'Instruction'),
     ) + regs_items['ann'] + (
@@ -357,16 +358,16 @@ class Decoder(srd.Decoder):
 
     def handle_ir_tdi(self, val):
         code = bin2int(val[0])
-        hex = '0x{:02X}'.format(code)
+        hexval = '0x{:02X}'.format(code)
         if code in ejtag_insn:
             # Format instruction name.
             insn = ejtag_insn[code]
             s_short = insn[0]
-            s_long = insn[0] + ': ' + insn[1] + ' (' + hex + ')'
+            s_long = insn[0] + ': ' + insn[1] + ' (' + hexval + ')'
             # Display it and select data register.
             self.put_current([Ann.INSTRUCTION, [s_long, s_short]])
         else:
-            self.put_current([Ann.INSTRUCTION, [hex, 'IR TDI ({})'.format(hex)]])
+            self.put_current([Ann.INSTRUCTION, [hexval, 'IR TDI ({})'.format(hexval)]])
         self.select_reg(code)
 
     def handle_new_state(self, new_state):