X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fjtag_ejtag%2Fpd.py;h=0bffde87bb517ca7884e7c1c54b17ded46a4b39c;hp=ba5db2a05897c3291b5b4c70c8221b4976938568;hb=d6d8a8a440ea2a81e6ddde33d16bc84d01cdb432;hpb=288e22b0cfe75e52e68c5ca2e586b47e26ccf91a

diff --git a/decoders/jtag_ejtag/pd.py b/decoders/jtag_ejtag/pd.py
index ba5db2a..0bffde8 100644
--- a/decoders/jtag_ejtag/pd.py
+++ b/decoders/jtag_ejtag/pd.py
@@ -197,6 +197,7 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['jtag']
     outputs = ['jtag_ejtag']
+    tags = ['Debug/trace']
     annotations = (
         ('instruction', 'Instruction'),
     ) + regs_items['ann'] + (
@@ -223,7 +224,7 @@ class Decoder(srd.Decoder):
         self.put(self.ss, self.es, self.out_ann, data)
 
     def put_at(self, ss: int, es: int, data):
-        self.put(ss, es, self.out_ann, data);
+        self.put(ss, es, self.out_ann, data)
 
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
@@ -247,14 +248,14 @@ class Decoder(srd.Decoder):
         s += 'Store' if pracc_write else 'Load/Fetch'
 
         if pracc_write:
-            if self.pracc_state.address_out != None:
+            if self.pracc_state.address_out is not None:
                 s += ', A:' + ' 0x{:08X}'.format(self.pracc_state.address_out)
-            if self.pracc_state.data_out != None:
+            if self.pracc_state.data_out is not None:
                 s += ', D:' + ' 0x{:08X}'.format(self.pracc_state.data_out)
         else:
-            if self.pracc_state.address_out != None:
+            if self.pracc_state.address_out is not None:
                 s += ', A:' + ' 0x{:08X}'.format(self.pracc_state.address_out)
-            if self.pracc_state.data_in != None:
+            if self.pracc_state.data_in is not None:
                 s += ', D:' + ' 0x{:08X}'.format(self.pracc_state.data_in)
 
         self.pracc_state.reset()
@@ -357,16 +358,16 @@ class Decoder(srd.Decoder):
 
     def handle_ir_tdi(self, val):
         code = bin2int(val[0])
-        hex = '0x{:02X}'.format(code)
+        hexval = '0x{:02X}'.format(code)
         if code in ejtag_insn:
             # Format instruction name.
             insn = ejtag_insn[code]
             s_short = insn[0]
-            s_long = insn[0] + ': ' + insn[1] + ' (' + hex + ')'
+            s_long = insn[0] + ': ' + insn[1] + ' (' + hexval + ')'
             # Display it and select data register.
             self.put_current([Ann.INSTRUCTION, [s_long, s_short]])
         else:
-            self.put_current([Ann.INSTRUCTION, [hex, 'IR TDI ({})'.format(hex)]])
+            self.put_current([Ann.INSTRUCTION, [hexval, 'IR TDI ({})'.format(hexval)]])
         self.select_reg(code)
 
     def handle_new_state(self, new_state):