X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fjtag%2Fpd.py;h=024192422808cf14dd4c44aed6ae4a5c96bbfe92;hp=36320d2ff1c05157a2c329561f6e9412e8ec74db;hb=ef36224880135a05d2fbde8f048ea3fe3f425df9;hpb=6b32f92828b18f510a5da1f729c3694bbe9b1f42 diff --git a/decoders/jtag/pd.py b/decoders/jtag/pd.py index 36320d2..0241924 100644 --- a/decoders/jtag/pd.py +++ b/decoders/jtag/pd.py @@ -18,10 +18,47 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# JTAG protocol decoder - import sigrokdecode as srd +''' +Protocol output format: + +JTAG packet: +[, ] + + is one of: + - 'NEW STATE': is the new state of the JTAG state machine. + Valid values: 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', 'SELECT-DR-SCAN', + 'CAPTURE-DR', 'SHIFT-DR', 'EXIT1-DR', 'PAUSE-DR', 'EXIT2-DR', 'UPDATE-DR', + 'SELECT-IR-SCAN', 'CAPTURE-IR', 'SHIFT-IR', 'EXIT1-IR', 'PAUSE-IR', + 'EXIT2-IR', 'UPDATE-IR'. + - 'IR TDI': Bitstring that was clocked into the IR register. + - 'IR TDO': Bitstring that was clocked out of the IR register. + - 'DR TDI': Bitstring that was clocked into the DR register. + - 'DR TDO': Bitstring that was clocked out of the DR register. + - ... + +All bitstrings are a sequence of '1' and '0' characters. The right-most +character in the bitstring is the LSB. Example: '01110001' (1 is LSB). +''' + +jtag_states = [ + # Intro "tree" + 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', + # DR "tree" + 'SELECT-DR-SCAN', 'CAPTURE-DR', 'UPDATE-DR', 'PAUSE-DR', + 'SHIFT-DR', 'EXIT1-DR', 'EXIT2-DR', + # IR "tree" + 'SELECT-IR-SCAN', 'CAPTURE-IR', 'UPDATE-IR', 'PAUSE-IR', + 'SHIFT-IR', 'EXIT1-IR', 'EXIT2-IR', +] + +def get_annotation_classes(): + l = [] + for s in jtag_states: + l.append([s.lower(), s]) + return l + class Decoder(srd.Decoder): api_version = 1 id = 'jtag' @@ -43,9 +80,7 @@ class Decoder(srd.Decoder): {'id': 'rtck', 'name': 'RTCK', 'desc': 'Return clock signal'}, ] options = {} - annotations = [ - ['Text', 'Human-readable text'], - ] + annotations = get_annotation_classes() def __init__(self, **kwargs): # self.state = 'TEST-LOGIC-RESET' @@ -56,16 +91,19 @@ class Decoder(srd.Decoder): self.bits_tdi = [] self.bits_tdo = [] self.samplenum = 0 + self.ss_item = self.es_item = None + self.saved_item = None + self.first = True def start(self): self.out_proto = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) def putx(self, data): - self.put(self.samplenum, self.samplenum, self.out_ann, data) + self.put(self.ss_item, self.es_item, self.out_ann, data) def putp(self, data): - self.put(self.samplenum, self.samplenum, self.out_proto, data) + self.put(self.ss_item, self.es_item, self.out_proto, data) def advance_state_machine(self, tms): self.oldstate = self.state @@ -115,9 +153,19 @@ class Decoder(srd.Decoder): # Rising TCK edges always advance the state machine. self.advance_state_machine(tms) - # Output the state we just switched to. - self.putx([0, ['New state: %s' % self.state]]) - self.putp(['NEW STATE', self.state]) + if self.first == True: + # Save the start sample and item for later (no output yet). + self.ss_item = self.samplenum + self.first = False + self.saved_item = self.state + else: + # Output the saved item (from the last CLK edge to the current). + self.es_item = self.samplenum + # Output the state we just switched to. + self.putx([jtag_states.index(self.state), [self.state]]) + self.putp(['NEW STATE', self.state]) + self.ss_item = self.samplenum + self.saved_item = self.state # If we went from SHIFT-IR to SHIFT-IR, or SHIFT-DR to SHIFT-DR, # collect the current TDI/TDO values (upon rising TCK edge).