X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fir_rc5%2Fpd.py;h=885b29d14450728406b7848f9cd7d36bdda0ebe6;hp=dddf93715900768961aedcb6e9ada3ef15102f23;hb=e28f7aee3b96afeb543e0c3c29e3950ddd61a490;hpb=da9bcbd9f45b0153465c55ec726a0d76f6d7f01e

diff --git a/decoders/ir_rc5/pd.py b/decoders/ir_rc5/pd.py
index dddf937..885b29d 100644
--- a/decoders/ir_rc5/pd.py
+++ b/decoders/ir_rc5/pd.py
@@ -22,7 +22,7 @@ import sigrokdecode as srd
 from .lists import *
 
 class Decoder(srd.Decoder):
-    api_version = 1
+    api_version = 2
     id = 'ir_rc5'
     name = 'IR RC-5'
     longname = 'IR RC-5'
@@ -30,7 +30,7 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['ir_rc5']
-    probes = (
+    channels = (
         {'id': 'ir', 'name': 'IR', 'desc': 'IR data line'},
     )
     options = (
@@ -168,8 +168,6 @@ class Decoder(srd.Decoder):
                 if edge == 's':
                     self.state = 'MID0'
                 bit = 0 if edge == 's' else None
-            else:
-                raise Exception('Invalid state: %s' % self.state)
 
             self.edges.append(self.samplenum)
             if bit != None: