X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fi2c.py;h=c57dd334198ea53ffd1494d435a6a2db1fe5692d;hp=93cf16757a438dbafcbb5d70e431bdc4bc6dca59;hb=1aef2f93a29f01168c04fd0478b29af290d8756b;hpb=400f9ae7ff16bb611d758d75ff4931b667561b11 diff --git a/decoders/i2c.py b/decoders/i2c.py index 93cf167..c57dd33 100644 --- a/decoders/i2c.py +++ b/decoders/i2c.py @@ -126,6 +126,19 @@ # 'signals': [{'SCL': }]} # +import sigrok + +# symbols for i2c decoders up the stack +START = 1 +START_REPEAT = 2 +STOP = 3 +ACK = 4 +NACK = 5 +ADDRESS_READ = 6 +ADDRESS_WRITE = 7 +DATA_READ = 8 +DATA_WRITE = 9 + # States FIND_START = 0 FIND_ADDRESS = 1 @@ -142,7 +155,8 @@ def sampleiter(data, unitsize): for i in range(0, len(data), unitsize): yield(Sample(data[i:i+unitsize])) -class Decoder(): +class Decoder(sigrok.Decoder): + id = 'i2c' name = 'I2C' longname = 'Inter-Integrated Circuit (I2C) bus' desc = 'I2C is a two-wire, multi-master, serial bus.' @@ -162,6 +176,8 @@ class Decoder(): def __init__(self, **kwargs): self.probes = Decoder.probes.copy() + self.output_protocol = None + self.output_annotation = None # TODO: Don't hardcode the number of channels. self.channels = 8 @@ -184,6 +200,8 @@ class Decoder(): def start(self, metadata): self.unitsize = metadata["unitsize"] + self.output_protocol = self.output_new(2) + self.output_annotation = self.output_new(1) def report(self): pass @@ -206,21 +224,23 @@ class Decoder(): return True return False - def find_start(self, scl, sda): - out = [] - # o = {'type': 'S', 'range': (self.samplenum, self.samplenum), - # 'data': None, 'ann': None}, - o = (self.is_repeat_start == 1) and 'Sr' or 'S' - out.append(o) + def found_start(self, scl, sda): + if self.is_repeat_start == 1: + out_proto = [ START_REPEAT ] + out_ann = [ "START REPEAT" ] + else: + out_proto = [ START ] + out_ann = [ "START" ] + self.put(self.output_protocol, out_proto) + self.put(self.output_annotation, out_ann) + self.state = FIND_ADDRESS self.bitcount = self.databyte = 0 self.is_repeat_start = 1 self.wr = -1 - return out - def find_address_or_data(self, scl, sda): + def found_address_or_data(self, scl, sda): """Gather 8 bits of data plus the ACK/NACK bit.""" - out = o = [] if self.startsample == -1: self.startsample = self.samplenum @@ -237,40 +257,44 @@ class Decoder(): # We received 8 address/data bits and the ACK/NACK bit. self.databyte >>= 1 # Shift out unwanted ACK/NACK bit here. - ack = (sda == 1) and 'N' or 'A' - if self.state == FIND_ADDRESS: d = self.databyte & 0xfe # The READ/WRITE bit is only in address bytes, not data bytes. - self.wr = (self.databyte & 1) and 1 or 0 + self.wr = 1 if (self.databyte & 1) else 0 elif self.state == FIND_DATA: d = self.databyte else: # TODO: Error? pass - # o = {'type': self.state, - # 'range': (self.startsample, self.samplenum - 1), - # 'data': d, 'ann': None} - - o = {'data': '0x%02x' % d} - + out_proto = [] + out_ann = [] # TODO: Simplify. if self.state == FIND_ADDRESS and self.wr == 1: - o['type'] = 'AW' + cmd = ADDRESS_WRITE + ann = 'ADDRESS WRITE' elif self.state == FIND_ADDRESS and self.wr == 0: - o['type'] = 'AR' + cmd = ADDRESS_READ + ann = 'ADDRESS READ' elif self.state == FIND_DATA and self.wr == 1: - o['type'] = 'DW' + cmd = DATA_WRITE + ann = 'DATA WRITE' elif self.state == FIND_DATA and self.wr == 0: - o['type'] = 'DR' + cmd = DATA_READ + ann = 'DATA READ' + out_proto.append( [cmd, d] ) + out_ann.append( ["%s" % ann, "0x%02x" % d] ) + + if sda == 1: + out_proto.append( [NACK] ) + out_ann.append( ["NACK"] ) + else: + out_proto.append( [ACK] ) + out_ann.append( ["ACK"] ) - out.append(o) + self.put(self.output_protocol, out_proto) + self.put(self.output_annotation, out_ann) - # o = {'type': ack, 'range': (self.samplenum, self.samplenum), - # 'data': None, 'ann': None} - o = ack - out.append(o) self.bitcount = self.databyte = 0 self.startsample = -1 @@ -281,29 +305,34 @@ class Decoder(): # So, either find a STOP condition or another data byte next. pass - return out - - def find_stop(self, scl, sda): - out = o = [] + def found_stop(self, scl, sda): + self.put(self.output_protocol, [ STOP ]) + self.put(self.output_annotation, [ "STOP" ]) - # o = {'type': 'P', 'range': (self.samplenum, self.samplenum), - # 'data': None, 'ann': None}, - o = 'P' - out.append(o) self.state = FIND_START self.is_repeat_start = 0 self.wr = -1 - return out + def put(self, output_id, data): + timeoffset = self.timeoffset + ((self.samplenum - self.bitcount) * self.period) + if self.bitcount > 0: + duration = self.bitcount * self.period + else: + duration = self.period + print "**", timeoffset, duration + super(Decoder, self).put(timeoffset, duration, output_id, data) - def decode(self, data): + def decode(self, timeoffset, duration, data): """I2C protocol decoder""" - out = [] - o = ack = d = '' + self.timeoffset = timeoffset + self.duration = duration + print "++", timeoffset, duration, len(data) + # duration of one bit in ps, only valid for this call to decode() + self.period = duration / len(data) # We should accept a list of samples and iterate... - for sample in sampleiter(data['data'], self.unitsize): + for sample in sampleiter(data, self.unitsize): # TODO: Eliminate the need for ord(). s = ord(sample.data) @@ -327,17 +356,17 @@ class Decoder(): # State machine. if self.state == FIND_START: if self.is_start_condition(scl, sda): - out += self.find_start(scl, sda) + self.found_start(scl, sda) elif self.state == FIND_ADDRESS: if self.is_data_bit(scl, sda): - out += self.find_address_or_data(scl, sda) + self.found_address_or_data(scl, sda) elif self.state == FIND_DATA: if self.is_data_bit(scl, sda): - out += self.find_address_or_data(scl, sda) + self.found_address_or_data(scl, sda) elif self.is_start_condition(scl, sda): - out += self.find_start(scl, sda) + self.found_start(scl, sda) elif self.is_stop_condition(scl, sda): - out += self.find_stop(scl, sda) + self.found_stop(scl, sda) else: # TODO: Error? pass @@ -346,8 +375,4 @@ class Decoder(): self.oldscl = scl self.oldsda = sda - if out != []: - sigrok.put(out) - -import sigrok