X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fi2c.py;h=967899ed5c24d282e86809403a0aa2b5f2398ba0;hp=5e63fdff9b62cb2aaaa4da26f270642730d67f21;hb=9a12a6e7af3d7091d8e35dd1c731402cb80a01b0;hpb=c9b24fc3d2f8c84338f07239edc1d4850164ae0c diff --git a/decoders/i2c.py b/decoders/i2c.py index 5e63fdf..967899e 100644 --- a/decoders/i2c.py +++ b/decoders/i2c.py @@ -75,42 +75,41 @@ # The protocol output consists of a (Python) list of I2C "packets", each of # which is of the form # -# [ _i2c_command_, _data_, _ack_bit_ ] +# [, , ] # -# _i2c_command_ is one of: +# is one of: # - 'START' (START condition) # - 'START_REPEAT' (Repeated START) -# - 'ADDRESS_READ' (Address, read) -# - 'ADDRESS_WRITE' (Address, write) +# - 'ADDRESS_READ' (Slave address, read) +# - 'ADDRESS_WRITE' (Slave address, write) # - 'DATA_READ' (Data, read) # - 'DATA_WRITE' (Data, write) # - 'STOP' (STOP condition) # -# _data_ is the data or address byte associated with the ADDRESS_* and DATA_* +# is the data or address byte associated with the ADDRESS_* and DATA_* # command. For START, START_REPEAT and STOP, this is None. # -# _ack_bit_ is either 'ACK' or 'NACK', but may also be None. -# +# is either 'ACK' or 'NACK', but may also be None. # -import sigrokdecode +import sigrokdecode as srd -# annotation feed formats +# Annotation feed formats ANN_SHIFTED = 0 ANN_SHIFTED_SHORT = 1 ANN_RAW = 2 -# values are verbose and short annotation, respectively +# Values are verbose and short annotation, respectively. protocol = { - 'START': ['START', 'S'], - 'START_REPEAT': ['START REPEAT', 'Sr'], - 'STOP': ['STOP', 'P'], - 'ACK': ['ACK', 'A'], - 'NACK': ['NACK', 'N'], - 'ADDRESS_READ': ['ADDRESS READ', 'AR'], - 'ADDRESS_WRITE': ['ADDRESS WRITE','AW'], - 'DATA_READ': ['DATA READ', 'DR'], - 'DATA_WRITE': ['DATA WRITE', 'DW'], + 'START': ['START', 'S'], + 'START_REPEAT': ['START REPEAT', 'Sr'], + 'STOP': ['STOP', 'P'], + 'ACK': ['ACK', 'A'], + 'NACK': ['NACK', 'N'], + 'ADDRESS_READ': ['ADDRESS READ', 'AR'], + 'ADDRESS_WRITE': ['ADDRESS WRITE', 'AW'], + 'DATA_READ': ['DATA READ', 'DR'], + 'DATA_WRITE': ['DATA WRITE', 'DW'], } # States @@ -118,11 +117,10 @@ FIND_START = 0 FIND_ADDRESS = 1 FIND_DATA = 2 - -class Decoder(sigrokdecode.Decoder): +class Decoder(srd.Decoder): id = 'i2c' name = 'I2C' - longname = 'Inter-Integrated Circuit (I2C) bus' + longname = 'Inter-Integrated Circuit' desc = 'I2C is a two-wire, multi-master, serial bus.' longdesc = '...' author = 'Uwe Hermann' @@ -137,20 +135,18 @@ class Decoder(sigrokdecode.Decoder): options = { 'address-space': ['Address space (in bits)', 7], } - annotation = [ + annotations = [ # ANN_SHIFTED - ["7-bit shifted hex", - "Read/Write bit shifted out from the 8-bit i2c slave address"], + ['7-bit shifted hex', + 'Read/write bit shifted out from the 8-bit I2C slave address'], # ANN_SHIFTED_SHORT - ["7-bit shifted hex (short)", - "Read/Write bit shifted out from the 8-bit i2c slave address"], + ['7-bit shifted hex (short)', + 'Read/write bit shifted out from the 8-bit I2C slave address'], # ANN_RAW - ["Raw hex", "Unaltered raw data"] + ['Raw hex', 'Unaltered raw data'], ] def __init__(self, **kwargs): - self.out_proto = None - self.out_ann = None self.samplecnt = 0 self.bitcount = 0 self.databyte = 0 @@ -162,38 +158,36 @@ class Decoder(sigrokdecode.Decoder): self.oldsda = None def start(self, metadata): - self.out_proto = self.add(sigrokdecode.SRD_OUTPUT_PROTOCOL, 'i2c') - self.out_ann = self.add(sigrokdecode.SRD_OUTPUT_ANNOTATION, 'i2c') + self.out_proto = self.add(srd.OUTPUT_PROTO, 'i2c') + self.out_ann = self.add(srd.OUTPUT_ANN, 'i2c') def report(self): pass def is_start_condition(self, scl, sda): - """START condition (S): SDA = falling, SCL = high""" + # START condition (S): SDA = falling, SCL = high if (self.oldsda == 1 and sda == 0) and scl == 1: return True return False def is_data_bit(self, scl, sda): - """Data sampling of receiver: SCL = rising""" + # Data sampling of receiver: SCL = rising if self.oldscl == 0 and scl == 1: return True return False def is_stop_condition(self, scl, sda): - """STOP condition (P): SDA = rising, SCL = high""" + # STOP condition (P): SDA = rising, SCL = high if (self.oldsda == 0 and sda == 1) and scl == 1: return True return False def found_start(self, scl, sda): - if self.is_repeat_start == 1: - cmd = 'START_REPEAT' - else: - cmd = 'START' - self.put(self.out_proto, [ cmd, None, None ]) - self.put(self.out_ann, [ ANN_SHIFTED, [protocol[cmd][0]] ]) - self.put(self.out_ann, [ ANN_SHIFTED_SHORT, [protocol[cmd][1]] ]) + cmd = 'START_REPEAT' if (self.is_repeat_start == 1) else 'START' + + self.put(self.out_proto, [cmd, None, None]) + self.put(self.out_ann, [ANN_SHIFTED, [protocol[cmd][0]]]) + self.put(self.out_ann, [ANN_SHIFTED_SHORT, [protocol[cmd][1]]]) self.state = FIND_ADDRESS self.bitcount = self.databyte = 0 @@ -201,10 +195,10 @@ class Decoder(sigrokdecode.Decoder): self.wr = -1 def found_address_or_data(self, scl, sda): - """Gather 8 bits of data plus the ACK/NACK bit.""" + # Gather 8 bits of data plus the ACK/NACK bit. if self.startsample == -1: - # TODO: should be samplenum, as received from the feed + # TODO: Should be samplenum, as received from the feed. self.startsample = self.samplecnt self.bitcount += 1 @@ -214,21 +208,18 @@ class Decoder(sigrokdecode.Decoder): # Return if we haven't collected all 8 + 1 bits, yet. if self.bitcount != 9: - return [] + return - # send raw output annotation before we start shifting out - # read/write and ack/nack bits - self.put(self.out_ann, [ANN_RAW, ["0x%.2x" % self.databyte]]) + # Send raw output annotation before we start shifting out + # read/write and ack/nack bits. + self.put(self.out_ann, [ANN_RAW, ['0x%.2x' % self.databyte]]) # We received 8 address/data bits and the ACK/NACK bit. self.databyte >>= 1 # Shift out unwanted ACK/NACK bit here. if self.state == FIND_ADDRESS: # The READ/WRITE bit is only in address bytes, not data bytes. - if self.databyte & 1: - self.wr = 0 - else: - self.wr = 1 + self.wr = 0 if (self.databyte & 1) else 1 d = self.databyte >> 1 elif self.state == FIND_DATA: d = self.databyte @@ -236,13 +227,9 @@ class Decoder(sigrokdecode.Decoder): # TODO: Error? pass - # last bit that came in was the ACK/NACK bit (1 = NACK) - if sda == 1: - ack_bit = 'NACK' - else: - ack_bit = 'ACK' + # Last bit that came in was the ACK/NACK bit (1 = NACK). + ack_bit = 'NACK' if (sda == 1) else 'ACK' - # TODO: Simplify. if self.state == FIND_ADDRESS and self.wr == 1: cmd = 'ADDRESS_WRITE' elif self.state == FIND_ADDRESS and self.wr == 0: @@ -251,17 +238,12 @@ class Decoder(sigrokdecode.Decoder): cmd = 'DATA_WRITE' elif self.state == FIND_DATA and self.wr == 0: cmd = 'DATA_READ' - self.put(self.out_proto, [ cmd, d, ack_bit ] ) - self.put(self.out_ann, [ANN_SHIFTED, [ - "%s" % protocol[cmd][0], - "0x%02x" % d, - "%s" % protocol[ack_bit][0]] - ] ) - self.put(self.out_ann, [ANN_SHIFTED_SHORT, [ - "%s" % protocol[cmd][1], - "0x%02x" % d, - "%s" % protocol[ack_bit][1]] - ] ) + + self.put(self.out_proto, [cmd, d, ack_bit]) + self.put(self.out_ann, [ANN_SHIFTED, + [protocol[cmd][0], '0x%02x' % d, protocol[ack_bit][0]]]) + self.put(self.out_ann, [ANN_SHIFTED_SHORT, + [protocol[cmd][1], '0x%02x' % d, protocol[ack_bit][1]]]) self.bitcount = self.databyte = 0 self.startsample = -1 @@ -274,17 +256,17 @@ class Decoder(sigrokdecode.Decoder): pass def found_stop(self, scl, sda): - self.put(self.out_proto, [ 'STOP', None, None ]) - self.put(self.out_ann, [ ANN_SHIFTED, [protocol['STOP'][0]] ]) - self.put(self.out_ann, [ ANN_SHIFTED_SHORT, [protocol['STOP'][1]] ]) + self.put(self.out_proto, ['STOP', None, None]) + self.put(self.out_ann, [ANN_SHIFTED, [protocol['STOP'][0]]]) + self.put(self.out_ann, [ANN_SHIFTED_SHORT, [protocol['STOP'][1]]]) self.state = FIND_START self.is_repeat_start = 0 self.wr = -1 def put(self, output_id, data): - # inject sample range into the call up to sigrok - # TODO: 0-0 sample range for now + # Inject sample range into the call up to sigrok. + # TODO: 0-0 sample range for now. super(Decoder, self).put(0, 0, output_id, data) def decode(self, timeoffset, duration, data):