X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Feeprom93cxx%2Fpd.py;h=cd54b4797dbf1d80c933fe8041145581213310ec;hp=06d92fb318af1f831cb4111e4f4e7c036652b2a9;hb=3505b1b5e1fb15ee44e267bcdf50a32ee603a4a9;hpb=b13ced31554253f301143aa7c8121a4460db57b6 diff --git a/decoders/eeprom93cxx/pd.py b/decoders/eeprom93cxx/pd.py index 06d92fb..cd54b47 100644 --- a/decoders/eeprom93cxx/pd.py +++ b/decoders/eeprom93cxx/pd.py @@ -23,7 +23,7 @@ class Decoder(srd.Decoder): api_version = 2 id = 'eeprom93cxx' name = '93Cxx EEPROM' - longname = '93Cxx EEPROM' + longname = '93Cxx Microwire EEPROM' desc = '93Cxx series Microwire EEPROM protocol.' license = 'gplv2+' inputs = ['microwire'] @@ -54,18 +54,18 @@ class Decoder(srd.Decoder): # Get address (MSb first). a = 0 for b in range(len(data)): - a += (data[b]['si'] << (len(data) - b - 1)) - self.put(data[0]['ss'], data[-1]['se'], self.out_ann, + a += (data[b].si << (len(data) - b - 1)) + self.put(data[0].ss, data[-1].es, self.out_ann, [0, ['Address: 0x%x' % a, 'Addr: 0x%x' % a, '0x%x' % a]]) def put_word(self, si, data): # Decode word (MSb first). word = 0 for b in range(len(data)): - idx = 'si' if si else 'so' - word += (data[b][idx] << (len(data) - b - 1)) + d = data[b].si if si else data[b].so + word += (d << (len(data) - b - 1)) idx = 0 if si else 1 - self.put(data[0]['ss'], data[-1]['se'], + self.put(data[0].ss, data[-1].es, self.out_ann, [idx, ['Data: 0x%x' % word, '0x%x' % word]]) def decode(self, ss, es, data): @@ -73,11 +73,11 @@ class Decoder(srd.Decoder): self.put(ss, es, self.out_ann, [2, ['Not enough packet bits']]) return - opcode = (data[0]['si'] << 1) + (data[1]['si'] << 0) + opcode = (data[0].si << 1) + (data[1].si << 0) if opcode == 2: # READ instruction. - self.put(data[0]['ss'], data[1]['se'], + self.put(data[0].ss, data[1].es, self.out_ann, [0, ['Read word', 'READ']]) self.put_address(data[2:2 + self.addresssize]) @@ -86,7 +86,7 @@ class Decoder(srd.Decoder): while len(data) - word_start > 0: # Check if there are enough bits for a word. if len(data) - word_start < self.wordsize: - self.put(data[word_start]['ss'], data[len(data) - 1]['se'], + self.put(data[word_start].ss, data[len(data) - 1].es, self.out_ann, [2, ['Not enough word bits']]) break self.put_word(False, data[word_start:word_start + self.wordsize]) @@ -94,44 +94,44 @@ class Decoder(srd.Decoder): word_start += self.wordsize elif opcode == 1: # WRITE instruction. - self.put(data[0]['ss'], data[1]['se'], + self.put(data[0].ss, data[1].es, self.out_ann, [0, ['Write word', 'WRITE']]) self.put_address(data[2:2 + self.addresssize]) # Get word. if len(data) < 2 + self.addresssize + self.wordsize: - self.put(data[2 + self.addresssize]['ss'], - data[len(data) - 1]['ss'], + self.put(data[2 + self.addresssize].ss, + data[len(data) - 1].ss, self.out_ann, [2, ['Not enough word bits']]) else: self.put_word(True, data[2 + self.addresssize:2 + self.addresssize + self.wordsize]) elif opcode == 3: # ERASE instruction. - self.put(data[0]['ss'], data[1]['se'], + self.put(data[0].ss, data[1].es, self.out_ann, [0, ['Erase word', 'ERASE']]) self.put_address(data[2:2 + self.addresssize]) elif opcode == 0: - if data[2]['si'] == 1 and data[3]['si'] == 1: + if data[2].si == 1 and data[3].si == 1: # WEN instruction. - self.put(data[0]['ss'], data[2 + self.addresssize - 1]['se'], + self.put(data[0].ss, data[2 + self.addresssize - 1].es, self.out_ann, [0, ['Write enable', 'WEN']]) - elif data[2]['si'] == 0 and data[3]['si'] == 0: + elif data[2].si == 0 and data[3].si == 0: # WDS instruction. - self.put(data[0]['ss'], data[2 + self.addresssize - 1]['se'], + self.put(data[0].ss, data[2 + self.addresssize - 1].es, self.out_ann, [0, ['Write disable', 'WDS']]) - elif data[2]['si'] == 1 and data[3]['si'] == 0: + elif data[2].si == 1 and data[3].si == 0: # ERAL instruction. - self.put(data[0]['ss'], data[2 + self.addresssize - 1]['se'], + self.put(data[0].ss, data[2 + self.addresssize - 1].es, self.out_ann, [0, ['Erase all memory', 'Erase all', 'ERAL']]) - elif data[2]['si'] == 0 and data[3]['si'] == 1: + elif data[2].si == 0 and data[3].si == 1: # WRAL instruction. - self.put(data[0]['ss'], data[2 + self.addresssize - 1]['se'], + self.put(data[0].ss, data[2 + self.addresssize - 1].es, self.out_ann, [0, ['Write all memory', 'Write all', 'WRAL']]) # Get word. if len(data) < 2 + self.addresssize + self.wordsize: - self.put(data[2 + self.addresssize]['ss'], - data[len(data) - 1]['ss'], + self.put(data[2 + self.addresssize].ss, + data[len(data) - 1].ss, self.out_ann, [2, ['Not enough word bits']]) else: self.put_word(True, data[2 + self.addresssize:2 + self.addresssize + self.wordsize])