X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fddc.py;h=395f72ff8bcb16643a205ae81c3de2379a3c1caf;hp=a628565151addd1b3a947a6ffabeafb7629f2b8a;hb=a2d2aff27099449deb1a791b3adc05ee610861e6;hpb=677d597b072c0a1d2df81c5c193cd3678aef8d03 diff --git a/decoders/ddc.py b/decoders/ddc.py index a628565..395f72f 100644 --- a/decoders/ddc.py +++ b/decoders/ddc.py @@ -23,52 +23,56 @@ # This decoder extracts a DDC stream from an I2C session between a computer # and a display device. The stream is output as plain bytes. # +# Details: +# https://en.wikipedia.org/wiki/Display_Data_Channel +# import sigrokdecode as srd - class Decoder(srd.Decoder): id = 'ddc' name = 'DDC' longname = 'Display Data Channel' - desc = 'DDC is a protocol for communication between computers and displays.' + desc = 'A protocol for communication between computers and displays.' longdesc = '' author = 'Bert Vermeulen ' + email = '' license = 'gplv3+' inputs = ['i2c'] outputs = ['ddc'] + probes = [] + options = {} annotations = [ - ["Byte stream", "DDC byte stream as read from display."], + ['Byte stream', 'DDC byte stream as read from display.'], ] def __init__(self, **kwargs): self.state = None def start(self, metadata): - self.out_ann = self.add(srd.SRD_OUTPUT_ANN, 'ddc') + self.out_ann = self.add(srd.OUTPUT_ANN, 'ddc') - def decode(self, start_sample, end_sample, i2c_data): + def decode(self, ss, es, data): try: - cmd, data, ack_bit = i2c_data + cmd, data, ack_bit = data except Exception as e: - raise Exception("malformed I2C input: %s" % str(e)) from e + raise Exception('malformed I2C input: %s' % str(e)) from e if self.state is None: - # waiting for the DDC session to start - if cmd in ('START', 'START_REPEAT'): + # Wait for the DDC session to start. + if cmd in ('START', 'START REPEAT'): self.state = 'start' elif self.state == 'start': - if cmd == 'ADDRESS_READ' and data == 80: + if cmd == 'ADDRESS READ' and data == 80: # 80 is the I2C slave address of a connected display, # so this marks the start of the DDC data transfer. self.state = 'transfer' elif cmd == 'STOP': - # back to idle + # Got back to the idle state. self.state = None elif self.state == 'transfer': - if cmd == 'DATA_READ': - # there shouldn't be anything but data reads on this - # address, so ignore everything else - self.put(start_sample, end_sample, self.out_ann, - [0, ["0x%.2x" % data]]) + if cmd == 'DATA READ': + # There shouldn't be anything but data reads on this + # address, so ignore everything else. + self.put(ss, es, self.out_ann, [0, ['0x%.2x' % data]])