X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fdcf77%2Fpd.py;h=acb6bdafce926465b0b3997b11cdccdb9712c5b8;hp=059d79c82df44564ab64149e57afc0fed95f62ac;hb=e144452bcdd5f2abbe6b6f3da41ad64f67e39def;hpb=e623c0fb15dcdca26fe181cddb9056630797a82d diff --git a/decoders/dcf77/pd.py b/decoders/dcf77/pd.py index 059d79c..acb6bda 100644 --- a/decoders/dcf77/pd.py +++ b/decoders/dcf77/pd.py @@ -14,8 +14,7 @@ ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## along with this program; if not, see . ## import sigrokdecode as srd @@ -33,13 +32,14 @@ class Decoder(srd.Decoder): desc = 'European longwave time signal (77.5kHz carrier signal).' license = 'gplv2+' inputs = ['logic'] - outputs = ['dcf77'] + outputs = [] + tags = ['Clock/timing'] channels = ( {'id': 'data', 'name': 'DATA', 'desc': 'DATA line'}, ) annotations = ( ('start-of-minute', 'Start of minute'), - ('special-bits', 'Special bits (civil warnings, weather forecast)'), + ('special-bit', 'Special bit (civil warnings, weather forecast)'), ('call-bit', 'Call bit'), ('summer-time', 'Summer time announcement'), ('cest', 'CEST bit'), @@ -55,9 +55,9 @@ class Decoder(srd.Decoder): ('month', 'Month'), ('year', 'Year'), ('date-parity', 'Date parity bit'), - ('raw-bits', 'Raw bits'), - ('unknown-bits', 'Unknown bits'), - ('warnings', 'Human-readable warnings'), + ('raw-bit', 'Raw bit'), + ('unknown-bit', 'Unknown bit'), + ('warning', 'Warning'), ) annotation_rows = ( ('bits', 'Bits', (17, 18)), @@ -66,6 +66,9 @@ class Decoder(srd.Decoder): ) def __init__(self): + self.reset() + + def reset(self): self.samplerate = None self.state = 'WAIT FOR RISING EDGE' self.ss_bit = self.ss_bit_old = self.es_bit = self.ss_block = 0 @@ -76,9 +79,6 @@ class Decoder(srd.Decoder): def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) - # Assume that the initial pin state is logic 1. - self.initial_pins = [1] - def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value @@ -128,7 +128,7 @@ class Decoder(srd.Decoder): else: self.tmp |= (bit << (c - 1)) if c == 14: - s = bin(self.tmp)[2:].zfill(14) + s = '{:014b}'.format(self.tmp) self.putb([1, ['Special bits: %s' % s, 'SB: %s' % s]]) elif c == 15: s = '' if (bit == 1) else 'not ' @@ -211,9 +211,13 @@ class Decoder(srd.Decoder): self.tmp |= (bit << (c - 42)) if c == 44: d = bcd2int(self.tmp) - dn = calendar.day_name[d - 1] # day_name[0] == Monday - self.putb([13, ['Day of week: %d (%s)' % (d, dn), - 'DoW: %d (%s)' % (d, dn)]]) + try: + dn = calendar.day_name[d - 1] # day_name[0] == Monday + self.putb([13, ['Day of week: %d (%s)' % (d, dn), + 'DoW: %d (%s)' % (d, dn)]]) + except IndexError: + self.putb([19, ['Day of week: %d (%s)' % (d, 'invalid'), + 'DoW: %d (%s)' % (d, 'inv')]]) elif c in range(45, 49 + 1): # Month (1-12): DCF77 bits 45-49 (BCD format). if c == 45: @@ -223,9 +227,13 @@ class Decoder(srd.Decoder): self.tmp |= (bit << (c - 45)) if c == 49: m = bcd2int(self.tmp) - mn = calendar.month_name[m] # month_name[1] == January - self.putb([14, ['Month: %d (%s)' % (m, mn), - 'Mon: %d (%s)' % (m, mn)]]) + try: + mn = calendar.month_name[m] # month_name[1] == January + self.putb([14, ['Month: %d (%s)' % (m, mn), + 'Mon: %d (%s)' % (m, mn)]]) + except IndexError: + self.putb([19, ['Month: %d (%s)' % (m, 'invalid'), + 'Mon: %d (%s)' % (m, 'inv')]]) elif c in range(50, 57 + 1): # Year (0-99): DCF77 bits 50-57 (BCD format). if c == 50: @@ -242,7 +250,8 @@ class Decoder(srd.Decoder): self.putx([16, ['Date parity: %s' % s, 'DP: %s' % s]]) self.datebits = [] else: - raise Exception('Invalid DCF77 bit: %d' % c) + self.putx([19, ['Invalid DCF77 bit: %d' % c, + 'Invalid bit: %d' % c, 'Inv: %d' % c]]) def decode(self): if not self.samplerate: @@ -291,11 +300,12 @@ class Decoder(srd.Decoder): elif len_high_ms in range(161, 260 + 1): bit = 1 else: - bit = -1 # TODO: Error? + bit = -1 - # There's no bit 59, make sure none is decoded. - if bit in (0, 1) and self.bitcount in range(0, 58 + 1): + if bit in (0, 1): self.handle_dcf77_bit(bit) self.bitcount += 1 + else: + self.putx([19, ['Invalid bit timing', 'Inv timing', 'Inv']]) self.state = 'WAIT FOR RISING EDGE'