X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fdcf77%2Fpd.py;h=7365134efc0b82bfea5ba7ed84bd6e99f7eb8376;hp=4789b66427b65afb01307e9be63676b6279d92ae;hb=6cbba91f23b9f9ace75b4722c9c0776b9211008d;hpb=aad263bb83593a66d4a834b30acf8e8a2f1b5c4c diff --git a/decoders/dcf77/pd.py b/decoders/dcf77/pd.py index 4789b66..7365134 100644 --- a/decoders/dcf77/pd.py +++ b/decoders/dcf77/pd.py @@ -32,7 +32,8 @@ class Decoder(srd.Decoder): desc = 'European longwave time signal (77.5kHz carrier signal).' license = 'gplv2+' inputs = ['logic'] - outputs = ['dcf77'] + outputs = [] + tags = ['Clock/timing'] channels = ( {'id': 'data', 'name': 'DATA', 'desc': 'DATA line'}, ) @@ -210,9 +211,13 @@ class Decoder(srd.Decoder): self.tmp |= (bit << (c - 42)) if c == 44: d = bcd2int(self.tmp) - dn = calendar.day_name[d - 1] # day_name[0] == Monday - self.putb([13, ['Day of week: %d (%s)' % (d, dn), - 'DoW: %d (%s)' % (d, dn)]]) + try: + dn = calendar.day_name[d - 1] # day_name[0] == Monday + self.putb([13, ['Day of week: %d (%s)' % (d, dn), + 'DoW: %d (%s)' % (d, dn)]]) + except IndexError: + self.putb([19, ['Day of week: %d (%s)' % (d, 'invalid'), + 'DoW: %d (%s)' % (d, 'inv')]]) elif c in range(45, 49 + 1): # Month (1-12): DCF77 bits 45-49 (BCD format). if c == 45: @@ -222,9 +227,13 @@ class Decoder(srd.Decoder): self.tmp |= (bit << (c - 45)) if c == 49: m = bcd2int(self.tmp) - mn = calendar.month_name[m] # month_name[1] == January - self.putb([14, ['Month: %d (%s)' % (m, mn), - 'Mon: %d (%s)' % (m, mn)]]) + try: + mn = calendar.month_name[m] # month_name[1] == January + self.putb([14, ['Month: %d (%s)' % (m, mn), + 'Mon: %d (%s)' % (m, mn)]]) + except IndexError: + self.putb([19, ['Month: %d (%s)' % (m, 'invalid'), + 'Mon: %d (%s)' % (m, 'inv')]]) elif c in range(50, 57 + 1): # Year (0-99): DCF77 bits 50-57 (BCD format). if c == 50: @@ -241,7 +250,8 @@ class Decoder(srd.Decoder): self.putx([16, ['Date parity: %s' % s, 'DP: %s' % s]]) self.datebits = [] else: - raise Exception('Invalid DCF77 bit: %d' % c) + self.putx([19, ['Invalid DCF77 bit: %d' % c, + 'Invalid bit: %d' % c, 'Inv: %d' % c]]) def decode(self): if not self.samplerate: @@ -290,11 +300,12 @@ class Decoder(srd.Decoder): elif len_high_ms in range(161, 260 + 1): bit = 1 else: - bit = -1 # TODO: Error? + bit = -1 - # There's no bit 59, make sure none is decoded. - if bit in (0, 1) and self.bitcount in range(0, 58 + 1): + if bit in (0, 1): self.handle_dcf77_bit(bit) self.bitcount += 1 + else: + self.putx([19, ['Invalid bit timing', 'Inv timing', 'Inv']]) self.state = 'WAIT FOR RISING EDGE'