X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fdcf77%2Fdcf77.py;h=e84b3db0e5f05034e4527b05ee617679deeff251;hp=b7e029dab8ff3c270a327d1a59d5550179de84b8;hb=abbc128575797da7b56b08940174229ce8fa8a9b;hpb=a2c2afd9357fab233a4f09531618faa81d54d4d9

diff --git a/decoders/dcf77/dcf77.py b/decoders/dcf77/dcf77.py
index b7e029d..e84b3db 100644
--- a/decoders/dcf77/dcf77.py
+++ b/decoders/dcf77/dcf77.py
@@ -18,28 +18,11 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-#
 # DCF77 protocol decoder
-#
-# More information:
-# http://en.wikipedia.org/wiki/DCF77
-#
-
-#
-# Protocol output format:
-# TODO
-#
 
 import sigrokdecode as srd
 import calendar
 
-# States
-WAIT_FOR_RISING_EDGE = 0
-GET_BIT = 1
-
-# Annotation feed formats
-ANN_ASCII = 0
-
 # Return the specified BCD number (max. 8 bits) as integer.
 def bcd2int(b):
     return (b & 0x0f) + ((b >> 4) * 10)
@@ -49,22 +32,23 @@ class Decoder(srd.Decoder):
     id = 'dcf77'
     name = 'DCF77'
     longname = 'DCF77 time protocol'
-    desc = 'TODO.'
-    longdesc = 'TODO.'
+    desc = 'European longwave time signal (77.5kHz carrier signal).'
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['dcf77']
     probes = [
         {'id': 'data', 'name': 'DATA', 'desc': 'DATA line'},
     ]
+    optional_probes = [
+        {'id': 'pon', 'name': 'PON', 'desc': 'TODO'},
+    ]
     options = {}
     annotations = [
-        # ANN_ASCII
-        ['ASCII', 'TODO: description'],
+        ['Text', 'Human-readable text'],
     ]
 
     def __init__(self, **kwargs):
-        self.state = WAIT_FOR_RISING_EDGE
+        self.state = 'WAIT FOR RISING EDGE'
         self.oldval = None
         self.samplenum = 0
         self.bit_start = 0
@@ -211,11 +195,9 @@ class Decoder(srd.Decoder):
             raise Exception('Invalid DCF77 bit: %d' % c)
 
     def decode(self, ss, es, data):
-        for samplenum, (pon, val) in data: # FIXME
-
-            self.samplenum += 1 # FIXME. Use samplenum. Off-by-one?
+        for (self.samplenum, (val)) in data: # TODO: Handle optional PON.
 
-            if self.state == WAIT_FOR_RISING_EDGE:
+            if self.state == 'WAIT FOR RISING EDGE':
                 # Wait until the next rising edge occurs.
                 if not (self.oldval == 0 and val == 1):
                     self.oldval = val
@@ -239,13 +221,13 @@ class Decoder(srd.Decoder):
                     self.bitcount = 0
                     self.bit_start_old = self.bit_start
                     self.dcf77_bitnumber_is_known = 1
-                    # Don't switch to GET_BIT state this time.
+                    # Don't switch to 'GET BIT' state this time.
                     continue
 
                 self.bit_start_old = self.bit_start
-                self.state = GET_BIT
+                self.state = 'GET BIT'
 
-            elif self.state == GET_BIT:
+            elif self.state == 'GET BIT':
                 # Wait until the next falling edge occurs.
                 if not (self.oldval == 1 and val == 0):
                     self.oldval = val
@@ -264,15 +246,15 @@ class Decoder(srd.Decoder):
                 else:
                     bit = -1 # TODO: Error?
 
-                # TODO: There's no bit 59, make sure none is decoded.
+                # There's no bit 59, make sure none is decoded.
                 if bit in (0, 1) and self.bitcount in range(0, 58 + 1):
                     self.handle_dcf77_bit(bit)
                     self.bitcount += 1
 
-                self.state = WAIT_FOR_RISING_EDGE
+                self.state = 'WAIT FOR RISING EDGE'
 
             else:
-                raise Exception('Invalid state: %s' % self.state)
+                raise Exception('Invalid state: %d' % self.state)
 
             self.oldval = val