X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fcan%2Fpd.py;h=e425575433510c3edea2512d0b707404134af4d9;hp=54a9da6575c70058a7ab007a876ea016ebd7a474;hb=e28f7aee3b96afeb543e0c3c29e3950ddd61a490;hpb=4b1813b4bc93a0b456f884c8de9f71df4bde6a39 diff --git a/decoders/can/pd.py b/decoders/can/pd.py index 54a9da6..e425575 100644 --- a/decoders/can/pd.py +++ b/decoders/can/pd.py @@ -18,12 +18,10 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# CAN protocol decoder - import sigrokdecode as srd class Decoder(srd.Decoder): - api_version = 1 + api_version = 2 id = 'can' name = 'CAN' longname = 'Controller Area Network' @@ -31,32 +29,45 @@ class Decoder(srd.Decoder): license = 'gplv2+' inputs = ['logic'] outputs = ['can'] - probes = [ + channels = ( {'id': 'can_rx', 'name': 'CAN RX', 'desc': 'CAN bus line'}, - ] - optional_probes = [] - options = { - 'bitrate': ['Bitrate', 1000000], # 1Mbit/s - 'sample_point': ['Sample point', 70], # 70% - } - annotations = [ - ['Text', 'Human-readable text'], - ['Warnings', 'Human-readable warnings'], - ] + ) + options = ( + {'id': 'bitrate', 'desc': 'Bitrate (bits/s)', 'default': 1000000}, + {'id': 'sample_point', 'desc': 'Sample point (%)', 'default': 70.0}, + ) + annotations = ( + ('data', 'CAN payload data'), + ('sof', 'Start of frame'), + ('eof', 'End of frame'), + ('id', 'Identifier'), + ('ext-id', 'Extended identifier'), + ('full-id', 'Full identifier'), + ('ide', 'Identifier extension bit'), + ('reserved-bit', 'Reserved bit 0 and 1'), + ('rtr', 'Remote transmission request'), + ('srr', 'Substitute remote request'), + ('dlc', 'Data length count'), + ('crc-sequence', 'CRC sequence'), + ('crc-delimiter', 'CRC delimiter'), + ('ack-slot', 'ACK slot'), + ('ack-delimiter', 'ACK delimiter'), + ('stuff-bit', 'Stuff bit'), + ('warnings', 'Human-readable warnings'), + ) def __init__(self, **kwargs): + self.samplerate = None self.reset_variables() - def start(self, metadata): - # self.out_proto = self.add(srd.OUTPUT_PROTO, 'can') - self.out_ann = self.add(srd.OUTPUT_ANN, 'can') - - self.samplerate = metadata['samplerate'] - self.bit_width = float(self.samplerate) / float(self.options['bitrate']) - self.bitpos = (self.bit_width / 100.0) * self.options['sample_point'] + def start(self): + self.out_ann = self.register(srd.OUTPUT_ANN) - def report(self): - pass + def metadata(self, key, value): + if key == srd.SRD_CONF_SAMPLERATE: + self.samplerate = value + self.bit_width = float(self.samplerate) / float(self.options['bitrate']) + self.bitpos = (self.bit_width / 100.0) * self.options['sample_point'] # Generic helper for CAN bit annotations. def putg(self, ss, es, data): @@ -101,7 +112,8 @@ class Decoder(srd.Decoder): return False # Stuff bit. Keep it in self.rawbits, but drop it from self.bits. - self.putx([0, ['Stuff bit: %d' % self.rawbits[-1]]]) + self.putx([15, ['Stuff bit: %d' % self.rawbits[-1], + 'SB: %d' % self.rawbits[-1], 'SB']]) self.bits.pop() # Drop last bit. return True @@ -128,22 +140,25 @@ class Decoder(srd.Decoder): x = self.last_databit + 1 crc_bits = self.bits[x:x + 15 + 1] self.crc = int(''.join(str(d) for d in crc_bits), 2) - self.putb([0, ['CRC: 0x%04x' % self.crc]]) + self.putb([11, ['CRC sequence: 0x%04x' % self.crc, + 'CRC: 0x%04x' % self.crc, 'CRC']]) if not self.is_valid_crc(crc_bits): - self.putb([0, ['CRC is invalid']]) + self.putb([16, ['CRC is invalid']]) # CRC delimiter bit (recessive) elif bitnum == (self.last_databit + 16): - self.putx([0, ['CRC delimiter: %d' % can_rx]]) + self.putx([12, ['CRC delimiter: %d' % can_rx, + 'CRC d: %d' % can_rx, 'CRC d']]) # ACK slot bit (dominant: ACK, recessive: NACK) elif bitnum == (self.last_databit + 17): ack = 'ACK' if can_rx == 0 else 'NACK' - self.putx([0, ['ACK slot: %s' % ack]]) + self.putx([13, ['ACK slot: %s' % ack, 'ACK s: %s' % ack, 'ACK s']]) # ACK delimiter bit (recessive) elif bitnum == (self.last_databit + 18): - self.putx([0, ['ACK delimiter: %d' % can_rx]]) + self.putx([14, ['ACK delimiter: %d' % can_rx, + 'ACK d: %d' % can_rx, 'ACK d']]) # Remember start of EOF (see below). elif bitnum == (self.last_databit + 19): @@ -151,7 +166,7 @@ class Decoder(srd.Decoder): # End of frame (EOF), 7 recessive bits elif bitnum == (self.last_databit + 25): - self.putb([0, ['End of frame', 'EOF']]) + self.putb([2, ['End of frame', 'EOF', 'E']]) self.reset_variables() return True @@ -163,13 +178,15 @@ class Decoder(srd.Decoder): # Bit 14: RB0 (reserved bit) # Has to be sent dominant, but receivers should accept recessive too. if bitnum == 14: - self.putx([0, ['RB0: %d' % can_rx]]) + self.putx([7, ['Reserved bit 0: %d' % can_rx, + 'RB0: %d' % can_rx, 'RB0']]) # Bit 12: Remote transmission request (RTR) bit # Data frame: dominant, remote frame: recessive # Remote frames do not contain a data field. rtr = 'remote' if self.bits[12] == 1 else 'data' - self.put12([0, ['RTR: %s frame' % rtr]]) + self.put12([8, ['Remote transmission request: %s frame' % rtr, + 'RTR: %s frame' % rtr, 'RTR']]) # Remember start of DLC (see below). elif bitnum == 15: @@ -178,7 +195,8 @@ class Decoder(srd.Decoder): # Bits 15-18: Data length code (DLC), in number of bytes (0-8). elif bitnum == 18: self.dlc = int(''.join(str(d) for d in self.bits[15:18 + 1]), 2) - self.putb([0, ['DLC: %d' % self.dlc]]) + self.putb([10, ['Data length code: %d' % self.dlc, + 'DLC: %d' % self.dlc, 'DLC']]) self.last_databit = 18 + (self.dlc * 8) # Remember all databyte bits, except the very last one. @@ -194,7 +212,8 @@ class Decoder(srd.Decoder): b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) ss = self.ss_databytebits[i * 8] es = self.ss_databytebits[((i + 1) * 8) - 1] - self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b)]]) + self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), + 'DB %d: 0x%02x' % (i, b), 'DB']]) self.ss_databytebits = [] elif bitnum > self.last_databit: @@ -212,28 +231,36 @@ class Decoder(srd.Decoder): # Bits 14-31: Extended identifier (EID[17..0]) elif bitnum == 31: self.eid = int(''.join(str(d) for d in self.bits[14:]), 2) - self.putb([0, ['Extended ID: %d (0x%x)' % (self.eid, self.eid)]]) + s = '%d (0x%x)' % (self.eid, self.eid) + self.putb([4, ['Extended Identifier: %s' % s, + 'Extended ID: %s' % s, 'Extended ID', 'EID']]) self.fullid = self.id << 18 | self.eid - self.putb([0, ['Full ID: %d (0x%x)' % (self.fullid, self.fullid)]]) + s = '%d (0x%x)' % (self.fullid, self.fullid) + self.putb([5, ['Full Identifier: %s' % s, 'Full ID: %s' % s, + 'Full ID', 'FID']]) # Bit 12: Substitute remote request (SRR) bit - self.put12([0, ['SRR: %d' % self.bits[12]]]) + self.put12([9, ['Substitute remote request: %d' % self.bits[12], + 'SRR: %d' % self.bits[12], 'SRR']]) # Bit 32: Remote transmission request (RTR) bit # Data frame: dominant, remote frame: recessive # Remote frames do not contain a data field. if bitnum == 32: rtr = 'remote' if can_rx == 1 else 'data' - self.putx([0, ['RTR: %s frame' % rtr]]) + self.putx([8, ['Remote transmission request: %s frame' % rtr, + 'RTR: %s frame' % rtr, 'RTR']]) # Bit 33: RB1 (reserved bit) elif bitnum == 33: - self.putx([0, ['RB1: %d' % can_rx]]) + self.putx([7, ['Reserved bit 1: %d' % can_rx, + 'RB1: %d' % can_rx, 'RB1']]) # Bit 34: RB0 (reserved bit) elif bitnum == 34: - self.putx([0, ['RB0: %d' % can_rx]]) + self.putx([7, ['Reserved bit 0: %d' % can_rx, + 'RB0: %d' % can_rx, 'RB0']]) # Remember start of DLC (see below). elif bitnum == 35: @@ -242,7 +269,8 @@ class Decoder(srd.Decoder): # Bits 35-38: Data length code (DLC), in number of bytes (0-8). elif bitnum == 38: self.dlc = int(''.join(str(d) for d in self.bits[35:38 + 1]), 2) - self.putb([0, ['DLC: %d' % self.dlc]]) + self.putb([10, ['Data length code: %d' % self.dlc, + 'DLC: %d' % self.dlc, 'DLC']]) self.last_databit = 38 + (self.dlc * 8) # Remember all databyte bits, except the very last one. @@ -258,7 +286,8 @@ class Decoder(srd.Decoder): b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) ss = self.ss_databytebits[i * 8] es = self.ss_databytebits[((i + 1) * 8) - 1] - self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b)]]) + self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), + 'DB %d: 0x%02x' % (i, b), 'DB']]) self.ss_databytebits = [] elif bitnum > self.last_databit: @@ -285,9 +314,9 @@ class Decoder(srd.Decoder): # Bit 0: Start of frame (SOF) bit if bitnum == 0: if can_rx == 0: - self.putx([0, ['Start of frame', 'SOF']]) + self.putx([1, ['Start of frame', 'SOF', 'S']]) else: - self.putx([1, ['Start of frame (SOF) must be a dominant bit']]) + self.putx([16, ['Start of frame (SOF) must be a dominant bit']]) # Remember start of ID (see below). elif bitnum == 1: @@ -297,7 +326,8 @@ class Decoder(srd.Decoder): # The bits ID[10..4] must NOT be all recessive. elif bitnum == 11: self.id = int(''.join(str(d) for d in self.bits[1:]), 2) - self.putb([0, ['ID: %d (0x%x)' % (self.id, self.id)]]) + s = '%d (0x%x)' % (self.id, self.id), + self.putb([3, ['Identifier: %s' % s, 'ID: %s' % s, 'ID']]) # RTR or SRR bit, depending on frame type (gets handled later). elif bitnum == 12: @@ -308,7 +338,8 @@ class Decoder(srd.Decoder): # Standard frame: dominant, extended frame: recessive elif bitnum == 13: ide = self.frame_type = 'standard' if can_rx == 0 else 'extended' - self.putx([0, ['IDE: %s frame' % ide]]) + self.putx([6, ['Identifier extension bit: %s frame' % ide, + 'IDE: %s frame' % ide, 'IDE']]) # Bits 14-X: Frame-type dependent, passed to the resp. handlers. elif bitnum >= 14: @@ -327,6 +358,8 @@ class Decoder(srd.Decoder): self.curbit += 1 def decode(self, ss, es, data): + if self.samplerate is None: + raise Exception("Cannot decode without samplerate.") for (self.samplenum, pins) in data: (can_rx,) = pins @@ -343,6 +376,4 @@ class Decoder(srd.Decoder): if not self.reached_bit(self.curbit): continue self.handle_bit(can_rx) - else: - raise Exception("Invalid state: %s" % self.state)