X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fcan%2Fpd.py;h=8817097b50e48cef770c031fe2f0efcb7113def9;hp=8c417fd3f3901fe454f6e9b591d5d8cf1f317201;hb=HEAD;hpb=6c890c087168b929a3017613b6ebfb7822a4f0fa diff --git a/decoders/can/pd.py b/decoders/can/pd.py index 8c417fd..fcd13e6 100644 --- a/decoders/can/pd.py +++ b/decoders/can/pd.py @@ -18,11 +18,15 @@ ## along with this program; if not, see . ## +from common.srdhelper import bitpack_msb import sigrokdecode as srd class SamplerateError(Exception): pass +def dlc2len(dlc): + return [0, 1, 2, 3, 4, 5, 6, 7, 8, 12, 16, 20, 24, 32, 48, 64][dlc] + class Decoder(srd.Decoder): api_version = 3 id = 'can' @@ -31,17 +35,18 @@ class Decoder(srd.Decoder): desc = 'Field bus protocol for distributed realtime control.' license = 'gplv2+' inputs = ['logic'] - outputs = [] + outputs = ['can'] tags = ['Automotive'] channels = ( {'id': 'can_rx', 'name': 'CAN RX', 'desc': 'CAN bus line'}, ) options = ( - {'id': 'bitrate', 'desc': 'Bitrate (bits/s)', 'default': 1000000}, + {'id': 'nominal_bitrate', 'desc': 'Nominal bitrate (bits/s)', 'default': 1000000}, + {'id': 'fast_bitrate', 'desc': 'Fast bitrate (bits/s)', 'default': 2000000}, {'id': 'sample_point', 'desc': 'Sample point (%)', 'default': 70.0}, ) annotations = ( - ('data', 'CAN payload data'), + ('data', 'Payload data'), ('sof', 'Start of frame'), ('eof', 'End of frame'), ('id', 'Identifier'), @@ -57,7 +62,7 @@ class Decoder(srd.Decoder): ('ack-slot', 'ACK slot'), ('ack-delimiter', 'ACK delimiter'), ('stuff-bit', 'Stuff bit'), - ('warnings', 'Human-readable warnings'), + ('warning', 'Warning'), ('bit', 'Bit'), ) annotation_rows = ( @@ -69,20 +74,28 @@ class Decoder(srd.Decoder): def __init__(self): self.reset() - def dlc2len(self, dlc): - return [0, 1, 2, 3, 4, 5, 6, 7, 8, 12, 16, 20, 24, 32, 48, 64][dlc] - def reset(self): self.samplerate = None self.reset_variables() def start(self): self.out_ann = self.register(srd.OUTPUT_ANN) + self.out_python = self.register(srd.OUTPUT_PYTHON) + + def set_bit_rate(self, bitrate): + self.bit_width = float(self.samplerate) / float(bitrate) + self.sample_point = (self.bit_width / 100.0) * self.options['sample_point'] + + def set_nominal_bitrate(self): + self.set_bit_rate(self.options['nominal_bitrate']) + + def set_fast_bitrate(self): + self.set_bit_rate(self.options['fast_bitrate']) def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value - self.bit_width = float(self.samplerate) / float(self.options['bitrate']) + self.bit_width = float(self.samplerate) / float(self.options['nominal_bitrate']) self.sample_point = (self.bit_width / 100.0) * self.options['sample_point'] # Generic helper for CAN bit annotations. @@ -106,6 +119,9 @@ class Decoder(srd.Decoder): def putb(self, data): self.putg(self.ss_block, self.samplenum, data) + def putpy(self, data): + self.put(self.ss_packet, self.es_packet, self.out_python, data) + def reset_variables(self): self.state = 'IDLE' self.sof = self.frame_type = self.dlc = None @@ -117,6 +133,8 @@ class Decoder(srd.Decoder): self.ss_bit12 = None self.ss_bit32 = None self.ss_databytebits = [] + self.frame_bytes = [] + self.rtr_type = None self.fd = False self.rtr = None @@ -129,16 +147,12 @@ class Decoder(srd.Decoder): self.dom_edge_snum = self.samplenum self.dom_edge_bcount = self.curbit - def bit_sampled(self): - # EMPTY - pass - # Determine the position of the next desired bit's sample point. def get_sample_point(self, bitnum): samplenum = self.dom_edge_snum - samplenum += int(self.bit_width * (bitnum - self.dom_edge_bcount)) - samplenum += int(self.sample_point) - return samplenum + samplenum += self.bit_width * (bitnum - self.dom_edge_bcount) + samplenum += self.sample_point + return int(samplenum) def is_stuff_bit(self): # CAN uses NRZ encoding and bit stuffing. @@ -171,9 +185,8 @@ class Decoder(srd.Decoder): # Remember start of CRC sequence (see below). if bitnum == (self.last_databit + 1): self.ss_block = self.samplenum - if self.fd: - if self.dlc2len(self.dlc) < 16: + if dlc2len(self.dlc) < 16: self.crc_len = 27 # 17 + SBC + stuff bits else: self.crc_len = 32 # 21 + SBC + stuff bits @@ -183,16 +196,16 @@ class Decoder(srd.Decoder): # CRC sequence (15 bits, 17 bits or 21 bits) elif bitnum == (self.last_databit + self.crc_len): if self.fd: - if self.dlc2len(self.dlc) < 16: - crc_type = "CRC-17" - else: - crc_type = "CRC-21" + if dlc2len(self.dlc) < 16: + crc_type = "CRC-17" + else: + crc_type = "CRC-21" else: - crc_type = "CRC" # TODO: CRC-15 (will break existing tests) + crc_type = "CRC-15" x = self.last_databit + 1 crc_bits = self.bits[x:x + self.crc_len + 1] - self.crc = int(''.join(str(d) for d in crc_bits), 2) + self.crc = bitpack_msb(crc_bits) self.putb([11, ['%s sequence: 0x%04x' % (crc_type, self.crc), '%s: 0x%04x' % (crc_type, self.crc), '%s' % crc_type]]) if not self.is_valid_crc(crc_bits): @@ -205,6 +218,9 @@ class Decoder(srd.Decoder): if can_rx != 1: self.putx([16, ['CRC delimiter must be a recessive bit']]) + if self.fd: + self.set_nominal_bitrate() + # ACK slot bit (dominant: ACK, recessive: NACK) elif bitnum == (self.last_databit + self.crc_len + 2): ack = 'ACK' if can_rx == 0 else 'NACK' @@ -226,6 +242,10 @@ class Decoder(srd.Decoder): self.putb([2, ['End of frame', 'EOF', 'E']]) if self.rawbits[-7:] != [1, 1, 1, 1, 1, 1, 1]: self.putb([16, ['End of frame (EOF) must be 7 recessive bits']]) + self.es_packet = self.samplenum + py_data = tuple([self.frame_type, self.fullid, self.rtr_type, + self.dlc, self.frame_bytes]) + self.putpy(py_data) self.reset_variables() return True @@ -234,23 +254,21 @@ class Decoder(srd.Decoder): # Returns True if the frame ended (EOF), False otherwise. def decode_standard_frame(self, can_rx, bitnum): - # Bit 14: FDF (Flexible Data Format) - # Has to be sent dominant when FD frame, has to be sent recessive when classic CAN frame. + # Bit 14: FDF (Flexible data format) + # Has to be sent dominant when FD frame, has to be sent recessive + # when classic CAN frame. if bitnum == 14: self.fd = True if can_rx else False - if self.fd: - self.putx([7, ['Flexible Data Format: %d' % can_rx, - 'FDF: %d' % can_rx, - 'FDF']]) + self.putx([7, ['Flexible data format: %d' % can_rx, + 'FDF: %d' % can_rx, 'FDF']]) else: self.putx([7, ['Reserved bit 0: %d' % can_rx, - 'RB0: %d' % can_rx, - 'RB0']]) + 'RB0: %d' % can_rx, 'RB0']]) - # SRR Substitute Remote Request if self.fd: - self.put12([8, ['Substitute Remote Request', 'SRR']]) + # Bit 12: Substitute remote request (SRR) bit + self.put12([8, ['Substitute remote request', 'SRR']]) self.dlc_start = 18 else: # Bit 12: Remote transmission request (RTR) bit @@ -259,19 +277,17 @@ class Decoder(srd.Decoder): rtr = 'remote' if self.bits[12] == 1 else 'data' self.put12([8, ['Remote transmission request: %s frame' % rtr, 'RTR: %s frame' % rtr, 'RTR']]) + self.rtr_type = rtr self.dlc_start = 15 - if bitnum == 15: - if self.fd: - self.putx([7, ['Reserved: %d' % can_rx, 'R0: %d' % can_rx, 'R0']]) + if bitnum == 15 and self.fd: + self.putx([7, ['Reserved: %d' % can_rx, 'R0: %d' % can_rx, 'R0']]) - if bitnum == 16: - if self.fd: - self.putx([7, ['Bit rate switch: %d' % can_rx, 'BRS: %d' % can_rx, 'BRS']]) + if bitnum == 16 and self.fd: + self.putx([7, ['Bit rate switch: %d' % can_rx, 'BRS: %d' % can_rx, 'BRS']]) - if bitnum == 17: - if self.fd: - self.putx([7, ['Error state indicator: %d' % can_rx, 'ESI: %d' % can_rx, 'ESI']]) + if bitnum == 17 and self.fd: + self.putx([7, ['Error state indicator: %d' % can_rx, 'ESI: %d' % can_rx, 'ESI']]) # Remember start of DLC (see below). elif bitnum == self.dlc_start: @@ -279,10 +295,10 @@ class Decoder(srd.Decoder): # Bits 15-18: Data length code (DLC), in number of bytes (0-8). elif bitnum == self.dlc_start + 3: - self.dlc = int(''.join(str(d) for d in self.bits[self.dlc_start:self.dlc_start + 4]), 2) + self.dlc = bitpack_msb(self.bits[self.dlc_start:self.dlc_start + 4]) self.putb([10, ['Data length code: %d' % self.dlc, - 'DLC: %d' % self.dlc, 'DLC']]) - self.last_databit = self.dlc_start + 3 + (self.dlc2len(self.dlc) * 8) + 'DLC: %d' % self.dlc, 'DLC']]) + self.last_databit = self.dlc_start + 3 + (dlc2len(self.dlc) * 8) if self.dlc > 8 and not self.fd: self.putb([16, ['Data length code (DLC) > 8 is not allowed']]) @@ -294,9 +310,10 @@ class Decoder(srd.Decoder): # The bits within a data byte are transferred MSB-first. elif bitnum == self.last_databit: self.ss_databytebits.append(self.samplenum) # Last databyte bit. - for i in range(self.dlc2len(self.dlc)): + for i in range(dlc2len(self.dlc)): x = self.dlc_start + 4 + (8 * i) - b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) + b = bitpack_msb(self.bits[x:x + 8]) + self.frame_bytes.append(b) ss = self.ss_databytebits[i * 8] es = self.ss_databytebits[((i + 1) * 8) - 1] self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), @@ -319,12 +336,12 @@ class Decoder(srd.Decoder): # Bits 14-31: Extended identifier (EID[17..0]) elif bitnum == 31: - self.eid = int(''.join(str(d) for d in self.bits[14:]), 2) + self.eid = bitpack_msb(self.bits[14:]) s = '%d (0x%x)' % (self.eid, self.eid) self.putb([4, ['Extended Identifier: %s' % s, 'Extended ID: %s' % s, 'Extended ID', 'EID']]) - self.fullid = self.id << 18 | self.eid + self.fullid = self.ident << 18 | self.eid s = '%d (0x%x)' % (self.fullid, self.fullid) self.putb([5, ['Full Identifier: %s' % s, 'Full ID: %s' % s, 'Full ID', 'FID']]) @@ -343,19 +360,18 @@ class Decoder(srd.Decoder): self.rtr = can_rx if not self.fd: - rtr = 'remote' if can_rx == 1 else 'data' - self.putx([8, ['Remote transmission request: %s frame' % rtr, + rtr = 'remote' if can_rx == 1 else 'data' + self.putx([8, ['Remote transmission request: %s frame' % rtr, 'RTR: %s frame' % rtr, 'RTR']]) + self.rtr_type = rtr # Bit 33: RB1 (reserved bit) elif bitnum == 33: self.fd = True if can_rx else False - if self.fd: self.dlc_start = 37 - self.putx([7, ['Flexible Data Format: %d' % can_rx, + self.putx([7, ['Flexible data format: %d' % can_rx, 'FDF: %d' % can_rx, 'FDF']]) - self.put32([7, ['Reserved bit 1: %d' % self.rtr, 'RB1: %d' % self.rtr, 'RB1']]) else: @@ -381,10 +397,10 @@ class Decoder(srd.Decoder): # Bits 35-38: Data length code (DLC), in number of bytes (0-8). elif bitnum == self.dlc_start + 3: - self.dlc = int(''.join(str(d) for d in self.bits[self.dlc_start:self.dlc_start + 4]), 2) + self.dlc = bitpack_msb(self.bits[self.dlc_start:self.dlc_start + 4]) self.putb([10, ['Data length code: %d' % self.dlc, 'DLC: %d' % self.dlc, 'DLC']]) - self.last_databit = self.dlc_start + 3 + (self.dlc2len(self.dlc) * 8) + self.last_databit = self.dlc_start + 3 + (dlc2len(self.dlc) * 8) # Remember all databyte bits, except the very last one. elif bitnum in range(self.dlc_start + 4, self.last_databit): @@ -394,9 +410,10 @@ class Decoder(srd.Decoder): # The bits within a data byte are transferred MSB-first. elif bitnum == self.last_databit: self.ss_databytebits.append(self.samplenum) # Last databyte bit. - for i in range(self.dlc2len(self.dlc)): + for i in range(dlc2len(self.dlc)): x = self.dlc_start + 4 + (8 * i) - b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) + b = bitpack_msb(self.bits[x:x + 8]) + self.frame_bytes.append(b) ss = self.ss_databytebits[i * 8] es = self.ss_databytebits[((i + 1) * 8) - 1] self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), @@ -415,6 +432,12 @@ class Decoder(srd.Decoder): # Get the index of the current CAN frame bit (without stuff bits). bitnum = len(self.bits) - 1 + if self.fd and can_rx: + if bitnum == 16 and self.frame_type == 'standard' \ + or bitnum == 35 and self.frame_type == 'extended': + self.dom_edge_seen(force=True) + self.set_fast_bitrate() + # If this is a stuff bit, remove it from self.bits and ignore it. if self.is_stuff_bit(): self.putx([15, [str(can_rx)]]) @@ -425,6 +448,7 @@ class Decoder(srd.Decoder): # Bit 0: Start of frame (SOF) bit if bitnum == 0: + self.ss_packet = self.samplenum self.putx([1, ['Start of frame', 'SOF', 'S']]) if can_rx != 0: self.putx([16, ['Start of frame (SOF) must be a dominant bit']]) @@ -436,10 +460,13 @@ class Decoder(srd.Decoder): # Bits 1-11: Identifier (ID[10..0]) # The bits ID[10..4] must NOT be all recessive. elif bitnum == 11: - self.id = int(''.join(str(d) for d in self.bits[1:]), 2) - s = '%d (0x%x)' % (self.id, self.id), + # BEWARE! Don't clobber the decoder's .id field which is + # part of its boiler plate! + self.ident = bitpack_msb(self.bits[1:]) + self.fullid = self.ident + s = '%d (0x%x)' % (self.ident, self.ident), self.putb([3, ['Identifier: %s' % s, 'ID: %s' % s, 'ID']]) - if (self.id & 0x7f0) == 0x7f0: + if (self.ident & 0x7f0) == 0x7f0: self.putb([16, ['Identifier bits 10..4 must not be all recessive']]) # RTR or SRR bit, depending on frame type (gets handled later). @@ -490,4 +517,3 @@ class Decoder(srd.Decoder): self.dom_edge_seen() if self.matched[0]: self.handle_bit(can_rx) - self.bit_sampled()