X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Favr_isp%2Fpd.py;h=789a7f9b1ac893b2879c5665b8184efd31fcec43;hp=4b496e0249fc64e061944992e61cbe2df84c101a;hb=be465111b552c7c2a2262ac49758a30a8bf1b1d5;hpb=77adad943111ab064f01838033dc9c94152f46c7 diff --git a/decoders/avr_isp/pd.py b/decoders/avr_isp/pd.py index 4b496e0..789a7f9 100644 --- a/decoders/avr_isp/pd.py +++ b/decoders/avr_isp/pd.py @@ -1,5 +1,5 @@ ## -## This file is part of the sigrok project. +## This file is part of the libsigrokdecode project. ## ## Copyright (C) 2012 Uwe Hermann ## @@ -29,7 +29,7 @@ class Decoder(srd.Decoder): api_version = 1 id = 'avr_isp' name = 'AVR ISP' - longname = 'AVR in-system programming' + longname = 'AVR In-System Programming' desc = 'Protocol for in-system programming Atmel AVR MCUs.' license = 'gplv2+' inputs = ['spi', 'logic'] @@ -50,9 +50,9 @@ class Decoder(srd.Decoder): self.cmd_ss, self.cmd_es = 0, 0 self.xx, self.yy, self.zz, self.mm = 0, 0, 0, 0 - def start(self, metadata): - # self.out_proto = self.add(srd.OUTPUT_PROTO, 'avr_isp') - self.out_ann = self.add(srd.OUTPUT_ANN, 'avr_isp') + def start(self): + # self.out_proto = self.register(srd.OUTPUT_PYTHON) + self.out_ann = self.register(srd.OUTPUT_ANN) def report(self): pass @@ -116,9 +116,18 @@ class Decoder(srd.Decoder): self.xx, self.yy, self.zz, self.mm = 0, 0, 0, 0 def handle_cmd_chip_erase(self, cmd, ret): - # TODO + # Chip erase (erases both flash an EEPROM). + # Upon successful chip erase, the lock bits will also be erased. + # The only way to end a Chip Erase cycle is to release RESET#. self.putx([0, ['Chip erase']]) + # TODO: Check/handle RESET#. + + # Sanity check on reply. + bit = (ret[2] & (1 << 7)) >> 7 + if ret[1] != 0xac or bit != 1 or ret[3] != cmd[2]: + self.putx([1, ['Warning: Unexpected bytes in reply!']]) + def handle_cmd_read_fuse_bits(self, cmd, ret): # Read fuse bits. self.putx([0, ['Read fuse bits: 0x%02x' % ret[3]]])