X-Git-Url: https://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Fam230x%2Fpd.py;h=3d36cbb510dc38d92dbf7616ce1195b64ca7e9aa;hp=3c5003d129693dd0bb3f42dd968532c9cdbb307f;hb=d6d8a8a440ea2a81e6ddde33d16bc84d01cdb432;hpb=97b874bd0b6913ed52df1b8aac5e7491479fac9a

diff --git a/decoders/am230x/pd.py b/decoders/am230x/pd.py
index 3c5003d..3d36cbb 100644
--- a/decoders/am230x/pd.py
+++ b/decoders/am230x/pd.py
@@ -42,6 +42,7 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['am230x']
+    tags = ['IC', 'Sensor']
     channels = (
         {'id': 'sda', 'name': 'SDA', 'desc': 'Single wire serial data line'},
     )
@@ -74,7 +75,7 @@ class Decoder(srd.Decoder):
     def putv(self, data):
         self.put(self.bytepos[-2], self.samplenum, self.out_ann, data)
 
-    def reset(self):
+    def reset_variables(self):
         self.state = 'WAIT FOR START LOW'
         self.fall = 0
         self.rise = 0
@@ -122,9 +123,12 @@ class Decoder(srd.Decoder):
         return checksum % 256
 
     def __init__(self):
-        self.samplerate = None
         self.reset()
 
+    def reset(self):
+        self.samplerate = None
+        self.reset_variables()
+
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
 
@@ -177,7 +181,7 @@ class Decoder(srd.Decoder):
                     self.rise = self.samplenum
                     self.state = 'WAIT FOR RESPONSE LOW'
                 else:
-                    self.reset()
+                    self.reset_variables()
             elif self.state == 'WAIT FOR RESPONSE LOW':
                 self.wait({0: 'f'})
                 if self.is_valid('START HIGH'):
@@ -185,14 +189,14 @@ class Decoder(srd.Decoder):
                     self.fall = self.samplenum
                     self.state = 'WAIT FOR RESPONSE HIGH'
                 else:
-                    self.reset()
+                    self.reset_variables()
             elif self.state == 'WAIT FOR RESPONSE HIGH':
                 self.wait({0: 'r'})
                 if self.is_valid('RESPONSE LOW'):
                     self.rise = self.samplenum
                     self.state = 'WAIT FOR FIRST BIT'
                 else:
-                    self.reset()
+                    self.reset_variables()
             elif self.state == 'WAIT FOR FIRST BIT':
                 self.wait({0: 'f'})
                 if self.is_valid('RESPONSE HIGH'):
@@ -201,14 +205,14 @@ class Decoder(srd.Decoder):
                     self.bytepos.append(self.samplenum)
                     self.state = 'WAIT FOR BIT HIGH'
                 else:
-                    self.reset()
+                    self.reset_variables()
             elif self.state == 'WAIT FOR BIT HIGH':
                 self.wait({0: 'r'})
                 if self.is_valid('BIT LOW'):
                     self.rise = self.samplenum
                     self.state = 'WAIT FOR BIT LOW'
                 else:
-                    self.reset()
+                    self.reset_variables()
             elif self.state == 'WAIT FOR BIT LOW':
                 self.wait({0: 'f'})
                 if self.is_valid('BIT 0 HIGH'):
@@ -216,10 +220,10 @@ class Decoder(srd.Decoder):
                 elif self.is_valid('BIT 1 HIGH'):
                     bit = 1
                 else:
-                    self.reset()
+                    self.reset_variables()
                     continue
                 self.handle_byte(bit)
             elif self.state == 'WAIT FOR END':
                 self.wait({0: 'r'})
                 self.putfs([3, ['End', 'E']])
-                self.reset()
+                self.reset_variables()