Main header is <libsigrokdecode/libsigrokdecode.h> now.

[libsigrokdecode.git] / type_logic.c

diff --git a/type_logic.c b/type_logic.c
index ebe81e33a6545abf210240735902feddf3a7235c..9f2b39277570c7a920cb87b933b04888fefb5f0a 100644 (file)
--- a/type_logic.c
+++ b/type_logic.c
@@ -1,5 +1,5 @@
 /*
- * This file is part of the sigrok project.
+ * This file is part of the libsigrokdecode project.
  *
  * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
  *
@@ -17,23 +17,23 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include "sigrokdecode.h" /* First, so we avoid a _POSIX_C_SOURCE warning. */
+#include "libsigrokdecode.h" /* First, so we avoid a _POSIX_C_SOURCE warning. */
 #include "config.h"
 #include <inttypes.h>
 #include <string.h>
 
-PyObject *srd_logic_iter(PyObject *self)
+static PyObject *srd_logic_iter(PyObject *self)
 {
        return self;
 }
 
-PyObject *srd_logic_iternext(PyObject *self)
+static PyObject *srd_logic_iternext(PyObject *self)
 {
        int i;
        PyObject *py_samplenum, *py_samples;
        srd_logic *logic;
        uint64_t sample;
-       unsigned char probe_samples[SRD_MAX_NUM_PROBES];
+       uint8_t probe_samples[SRD_MAX_NUM_PROBES + 1];
 
        logic = (srd_logic *)self;
        if (logic->itercnt >= logic->inbuflen / logic->di->data_unitsize) {
@@ -45,12 +45,26 @@ PyObject *srd_logic_iternext(PyObject *self)
         * Convert the bit-packed sample to an array of bytes, with only 0x01
         * and 0x00 values, so the PD doesn't need to do any bitshifting.
         */
+
+       /* Get probe bits into the 'sample' variable. */
        memcpy(&sample,
               logic->inbuf + logic->itercnt * logic->di->data_unitsize,
               logic->di->data_unitsize);
-       for (i = 0; i < logic->di->dec_num_probes; i++)
-               probe_samples[i] =
-                   sample & (1 << logic->di->dec_probemap[i]) ? 1 : 0;
+
+       /* All probe values (required + optional) are pre-set to 42. */
+       memset(probe_samples, 42, logic->di->dec_num_probes);
+       /* TODO: None or -1 in Python would be better. */
+
+       /*
+        * Set probe values of specified/used probes to their resp. values.
+        * Unused probe values (those not specified by the user) remain at 42.
+        */
+       for (i = 0; i < logic->di->dec_num_probes; i++) {
+               /* A probemap value of -1 means "unused optional probe". */
+               if (logic->di->dec_probemap[i] == -1)
+                       continue;
+               probe_samples[i] = sample & (1 << logic->di->dec_probemap[i]) ? 1 : 0;
+       }
 
        /* Prepare the next samplenum/sample list in this iteration. */
        py_samplenum =
@@ -66,7 +80,8 @@ PyObject *srd_logic_iternext(PyObject *self)
        return logic->sample;
 }
 
-PyTypeObject srd_logic_type = {
+/** @cond PRIVATE */
+SRD_PRIV PyTypeObject srd_logic_type = {
        PyVarObject_HEAD_INIT(NULL, 0)
        .tp_name = "srd_logic",
        .tp_basicsize = sizeof(srd_logic),
@@ -75,3 +90,4 @@ PyTypeObject srd_logic_type = {
        .tp_iter = srd_logic_iter,
        .tp_iternext = srd_logic_iternext,
 };
+/** @endcond */