decoders: Fix incorrect 'outputs' fields.

[libsigrokdecode.git] / decoders / x2444m / pd.py

diff --git a/decoders/x2444m/pd.py b/decoders/x2444m/pd.py
index a6534eeb661aeb63b02dc1203bf3b2cd620ed46a..290cc368b8f5787e5177ba6ad3dda45bb9d3bc0d 100644 (file)
--- a/decoders/x2444m/pd.py
+++ b/decoders/x2444m/pd.py
@@ -39,7 +39,8 @@ class Decoder(srd.Decoder):
     desc = 'Xicor X2444M/P nonvolatile static RAM protocol.'
     license = 'gplv2+'
     inputs = ['spi']
-    outputs = ['x2444m']
+    outputs = []
+    tags = ['IC', 'Memory']
     annotations = (
         ('wrds', 'Write disable'),
         ('sto', 'Store RAM data in EEPROM'),
@@ -55,20 +56,20 @@ class Decoder(srd.Decoder):
         self.reset()
 
     def reset(self):
-        pass
-
-    def start(self):
-        self.out_ann = self.register(srd.OUTPUT_ANN)
         self.cs_start = 0
         self.cs_asserted = False
         self.cmd_digit = 0
 
+    def start(self):
+        self.out_ann = self.register(srd.OUTPUT_ANN)
+
     def putreadwrite(self, ss, es, reg, idx, addr, value):
         self.put(ss, es, self.out_ann,
-                 [idx, ['%s: %s => 0x%4.4x' % (reg, addr, value)]])
+                 [idx, ['%s: %s => 0x%4.4x' % (reg, addr, value),
+                        '%s: %s => 0x%4.4x' % (reg[0], addr, value), reg[0]]])
 
     def putcmd(self, ss, es, reg, idx):
-        self.put(ss, es, self.out_ann, [idx, ['%s' % reg]])
+        self.put(ss, es, self.out_ann, [idx, [reg, reg[0]]])
 
     def decode(self, ss, es, data):
         ptype, mosi, miso = data