srd: decoders: Metadata consistency fixes/updates.

[libsigrokdecode.git] / decoders / srd_usb.py

diff --git a/decoders/srd_usb.py b/decoders/srd_usb.py
index 2db0158640406aeb5073f7c86d041d3602e7e6ee..9998e5b1550b2fa370f55402e3397029a46eb34a 100644 (file)
--- a/decoders/srd_usb.py
+++ b/decoders/srd_usb.py
@@ -40,51 +40,42 @@
 # http://www.usb.org/developers/docs/
 #
 
-import sigrok
-
-class Sample():
-    def __init__(self, data):
-        self.data = data
-    def probe(self, probe):
-        s = self.data[int(probe / 8)] & (1 << (probe % 8))
-        return True if s else False
-
-def sampleiter(data, unitsize):
-    for i in range(0, len(data), unitsize):
-        yield(Sample(data[i:i+unitsize]))
+import sigrokdecode as srd
 
 # States
 SE0, J, K, SE1 = 0, 1, 2, 3
 syms = {
-        (False, False): SE0,
-        (True, False): J,
-        (False, True): K,
-        (True, True): SE1,
+        (0, 0): SE0,
+        (1, 0): J,
+        (0, 1): K,
+        (1, 1): SE1,
 }
 
 def bitstr_to_num(bitstr):
-    if not bitstr: return 0
+    if not bitstr:
+        return 0
     l = list(bitstr)
     l.reverse()
     return int(''.join(l), 2)
 
 def packet_decode(packet):
     pids = {
-        '10000111':'OUT',      # Tokens
-        '10010110':'IN',
-        '10100101':'SOF',
-        '10110100':'SETUP',
-        '11000011':'DATA0',    # Data
-        '11010010':'DATA1',
-        '01001011':'ACK',      # Handshake
-        '01011010':'NAK',
-        '01111000':'STALL',
-        '01101001':'NYET',
+        '10000111': 'OUT',      # Tokens
+        '10010110': 'IN',
+        '10100101': 'SOF',
+        '10110100': 'SETUP',
+        '11000011': 'DATA0',    # Data
+        '11010010': 'DATA1',
+        '01001011': 'ACK',      # Handshake
+        '01011010': 'NAK',
+        '01111000': 'STALL',
+        '01101001': 'NYET',
     }
 
     sync = packet[:8]
     pid = packet[8:16]
     pid = pids.get(pid, pid)
+
     # Remove CRC.
     if pid in ('OUT', 'IN', 'SOF', 'SETUP'):
         data = packet[16:-5]
@@ -93,50 +84,50 @@ def packet_decode(packet):
         else:
             dev = bitstr_to_num(data[:7])
             ep = bitstr_to_num(data[7:])
-            data = "DEV %d EP %d" % (dev, ep)
+            data = 'DEV %d EP %d' % (dev, ep)
 
     elif pid in ('DATA0', 'DATA1'):
         data = packet[16:-16]
-        tmp = ""
+        tmp = ''
         while data:
-            tmp += "%02X " % bitstr_to_num(data[:8])
+            tmp += '%02X ' % bitstr_to_num(data[:8])
             data = data[8:]
         data = tmp
     else:
         data = packet[16:]
 
-    if sync != "00000001":
-        return "SYNC INVALID!"
+    if sync != '00000001':
+        return 'SYNC INVALID!'
 
     return pid + ' ' + data
 
-class Decoder(sigrok.Decoder):
+class Decoder(srd.Decoder):
     id = 'usb'
     name = 'USB'
-    desc = 'Universal Serial Bus'
     longname = '...longname...'
+    desc = 'Universal Serial Bus'
     longdesc = '...longdesc...'
     author = 'Gareth McMullin'
     email = 'gareth@blacksphere.co.nz'
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['usb']
-    # Probe names with a set of defaults
-    probes = {'dp':0, 'dm':1}
+    probes = [
+        {'id': 'dp', 'name': 'D+', 'desc': 'USB D+ signal'},
+        {'id': 'dm', 'name': 'D-', 'desc': 'USB D- signal'},
+    ]
     options = {}
+    annotations = []
 
     def __init__(self):
-        self.probes = Decoder.probes.copy()
-        self.output_protocol = None
-        self.output_annotation = None
+        pass
 
     def start(self, metadata):
-        self.unitsize = metadata['unitsize']
         self.rate = metadata['samplerate']
-        # self.output_protocol = self.output_new(2)
-        self.output_annotation = self.output_new(1)
+        # self.out_proto = self.add(srd.OUTPUT_PROTO, 'usb')
+        self.out_ann = self.add(srd.OUTPUT_ANN, 'usb')
         if self.rate < 48000000:
-            raise Exception("Sample rate not sufficient for USB decoding")
+            raise Exception('Sample rate not sufficient for USB decoding')
         # Initialise decoder state.
         self.sym = J
         self.scount = 0
@@ -145,12 +136,12 @@ class Decoder(sigrok.Decoder):
     def decode(self, timeoffset, duration, data):
         out = []
 
-        for sample in sampleiter(data, self.unitsize):
+        # FIXME
+        for (samplenum, (dp, dm, x, y, z, a)) in data:
 
             self.scount += 1
 
-            sym = syms[sample.probe(self.probes['dp']),
-                       sample.probe(self.probes['dm'])]
+            sym = syms[dp, dm]
             if sym == self.sym:
                 continue
 
@@ -170,11 +161,11 @@ class Decoder(sigrok.Decoder):
             if self.sym == SE0:
                 if bitcount == 1:
                     # End-Of-Packet (EOP)
-                    out += [{"type":"usb", "data":self.packet,
-                              "display":packet_decode(self.packet)}]
+                    out += [{'type': 'usb', 'data': self.packet,
+                             'display': packet_decode(self.packet)}]
                 else:
                     # Longer than EOP, assume reset.
-                    out += [{"type":"usb", "display":"RESET"}]
+                    out += [{'type': 'usb', 'display': 'RESET'}]
                 self.scount = 0
                 self.sym = sym
                 self.packet = ''
@@ -186,12 +177,12 @@ class Decoder(sigrok.Decoder):
             if bitcount < 6 and sym != SE0:
                 self.packet += '0'
             elif bitcount > 6:
-                out += [{"type":"usb", "display":"BIT STUFF ERROR"}]
+                out += [{'type': 'usb', 'display': 'BIT STUFF ERROR'}]
 
             self.scount = 0
             self.sym = sym
 
         if out != []:
-            # self.put(self.output_protocol, 0, 0, out_proto)
-            self.put(self.output_annotation, 0, 0, out)
+            # self.put(0, 0, self.out_proto, out_proto)
+            self.put(0, 0, self.out_ann, out)