avr_isp: Add more parts

[libsigrokdecode.git] / decoders / pca9571 / pd.py

diff --git a/decoders/pca9571/pd.py b/decoders/pca9571/pd.py
index 3832653ab3f5c3fc2d94fb8d2d1b8a858a305423..ea8715d6d2ca15c1fecfd5d7b61ddc18a9eae215 100644 (file)
--- a/decoders/pca9571/pd.py
+++ b/decoders/pca9571/pd.py
@@ -23,11 +23,17 @@ NUM_OUTPUT_CHANNELS = 8
 
 # TODO: Other I²C functions: general call / reset address, device ID address.
 
+def logic_channels(num_channels):
+    l = []
+    for i in range(num_channels):
+        l.append(tuple(['p%d' % i, 'P%d' % i]))
+    return tuple(l)
+
 class Decoder(srd.Decoder):
     api_version = 3
     id = 'pca9571'
-    name = 'NXP PCA9571'
-    longname = 'NXP Semiconductors PCA9571'
+    name = 'PCA9571'
+    longname = 'NXP PCA9571'
     desc = 'NXP PCA9571 8-bit I²C output expander.'
     license = 'gplv2+'
     inputs = ['i2c']
@@ -36,8 +42,9 @@ class Decoder(srd.Decoder):
     annotations = (
         ('register', 'Register type'),
         ('value', 'Register value'),
-        ('warning', 'Warning messages'),
+        ('warning', 'Warning'),
     )
+    logic_output_channels = logic_channels(NUM_OUTPUT_CHANNELS)
     annotation_rows = (
         ('regs', 'Registers', (0, 1)),
         ('warnings', 'Warnings', (2,)),
@@ -49,13 +56,24 @@ class Decoder(srd.Decoder):
     def reset(self):
         self.state = 'IDLE'
         self.last_write = 0xFF # Chip port default state is high.
+        self.last_write_es = 0
 
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
+        self.out_logic = self.register(srd.OUTPUT_LOGIC)
+
+    def flush(self):
+        self.put_logic_states()
 
     def putx(self, data):
         self.put(self.ss, self.es, self.out_ann, data)
 
+    def put_logic_states(self):
+        if (self.es > self.last_write_es):
+            data = bytes([self.last_write])
+            self.put(self.last_write_es, self.es, self.out_logic, [0, data])
+            self.last_write_es = self.es
+
     def handle_io(self, b):
         if self.state == 'READ DATA':
             operation = ['Outputs read', 'R']
@@ -64,7 +82,9 @@ class Decoder(srd.Decoder):
                                '(%02X) are different' % self.last_write]])
         else:
             operation = ['Outputs set', 'W']
+            self.put_logic_states()
             self.last_write = b
+
         self.putx([1, [operation[0] + ': %02X' % b,
                        operation[1] + ': %02X' % b]])