Rename 'probe' to 'channel' everywhere.

[libsigrokdecode.git] / decoders / parallel / __init__.py

diff --git a/decoders/parallel/__init__.py b/decoders/parallel/__init__.py
index ea55077d04804d51d5979212b8ccfafebc1c3d88..cc1f3d1322a755e20fab2da9d4d1450fb502eeab 100644 (file)
--- a/decoders/parallel/__init__.py
+++ b/decoders/parallel/__init__.py
@@ -20,14 +20,14 @@
 
 '''
 This protocol decoder can decode synchronous parallel buses with various
-number of data bits/probes and one (optional) clock line.
+number of data bits/channels and one (optional) clock line.
 
 If no clock line is supplied, the decoder works slightly differently in
-that it interprets every transition on any of the supplied data probes
+that it interprets every transition on any of the supplied data channels
 like there had been a clock transition.
 
-It is required to use the lowest data probes, and use consecutive ones.
-For example, for a 4-bit sync parallel bus, probes D0/D1/D2/D3 (and CLK)
+It is required to use the lowest data channels, and use consecutive ones.
+For example, for a 4-bit sync parallel bus, channels D0/D1/D2/D3 (and CLK)
 should be used. Using combinations like D7/D12/D3/D15 is not supported.
 For an 8-bit bus you should use D0-D7, for a 16-bit bus use D0-D15 and so on.
 '''