All PDs: Only import the 'Decoder' object.

[libsigrokdecode.git] / decoders / onewire_link / __init__.py

diff --git a/decoders/onewire_link/__init__.py b/decoders/onewire_link/__init__.py
index c1331c6322d1d6988170816f67c8896c3d9f47a9..12aad259290b23db0b283c05fa4f852344dc53d0 100644 (file)
--- a/decoders/onewire_link/__init__.py
+++ b/decoders/onewire_link/__init__.py
@@ -1,5 +1,5 @@
 ##
-## This file is part of the sigrok project.
+## This file is part of the libsigrokdecode project.
 ##
 ## Copyright (C) 2012 Uwe Hermann <uwe@hermann-uwe.de>
 ##
@@ -19,7 +19,7 @@
 ##
 
 '''
-1-Wire protocol decoder (link layer).
+This protocol decoder handles the 1-Wire link layer.
 
 The 1-Wire protocol enables bidirectional communication over a single wire
 (and ground) between a single master and one or multiple slaves. The protocol
@@ -29,8 +29,6 @@ is layered:
  - Network layer (skip/search/match device ROM addresses)
  - Transport layer (transport data between 1-Wire master and device)
 
-Link layer protocol details:
-
 Sample rate:
 A sufficiently high samplerate is required to properly detect all the elements
 of the protocol. A lower samplerate can be used if the master does not use
@@ -39,7 +37,7 @@ overdrive communication speed. The following minimal values should be used:
  - overdrive available: 2MHz minimum, 5MHz suggested
  - overdrive not available: 400kHz minimum, 1MHz suggested
 
-Probes:
+Channels:
 1-Wire requires a single signal, but some master implementations might have a
 separate signal used to deliver power to the bus during temperature conversion
 as an example. This power signal is currently not used.
@@ -65,27 +63,6 @@ configure the following timing values (number of samplerate periods):
 
 These options should be configured only on very rare cases and the user should
 read the decoder source code to understand them correctly.
-
-Protocol output format:
-TODO.
-
-Annotations:
-
-Link layer annotations show the following events:
-
- - NOTE/WARNING/ERROR
-   Possible samplerate related timing issues are reported.
- - Reset/presence true/false
-   The event is marked from the signal negative edge to the end of the reset
-   high period. It's also reported if there are any devices attached to the bus.
- - Bit 0/1
-   The event is marked from the signal negative edge to the end of the data
-   slot. The value of each received bit is also provided.
-
-TODO:
-- Check for protocol correctness, if events are timed inside prescribed limits.
-- Maybe add support for interrupts, check if this feature is deprecated.
 '''
 
-from .pd import *
-
+from .pd import Decoder