avr_isp: Add more parts

[libsigrokdecode.git] / decoders / jtag_stm32 / pd.py

diff --git a/decoders/jtag_stm32/pd.py b/decoders/jtag_stm32/pd.py
index 4cd58bbfdc501188b58727a0d3fe7e0fbdbbd980..82558b820f97577b768637f1da74c8e7921a0e63 100644 (file)
--- a/decoders/jtag_stm32/pd.py
+++ b/decoders/jtag_stm32/pd.py
@@ -146,7 +146,8 @@ class Decoder(srd.Decoder):
     desc = 'ST STM32-specific JTAG protocol.'
     license = 'gplv2+'
     inputs = ['jtag']
-    outputs = ['jtag_stm32']
+    outputs = []
+    tags = ['Debug/trace']
     annotations = (
         ('item', 'Item'),
         ('field', 'Field'),
@@ -232,11 +233,7 @@ class Decoder(srd.Decoder):
             val, self.samplenums = val
             self.samplenums.reverse()
 
-        # State machine
-        if self.state == 'IDLE':
-            # Wait until a new instruction is shifted into the IR register.
-            if cmd != 'IR TDI':
-                return
+        if cmd == 'IR TDI':
             # Switch to the state named after the instruction, or 'UNKNOWN'.
             # The STM32F10xxx has two serially connected JTAG TAPs, the
             # boundary scan tap (5 bits) and the Cortex-M3 TAP (4 bits).
@@ -246,7 +243,9 @@ class Decoder(srd.Decoder):
             self.putf(4, 8, [1, ['IR (BS TAP): ' + bstap_ir]])
             self.putf(0, 3, [1, ['IR (M3 TAP): ' + self.state]])
             self.putx([2, ['IR: %s' % self.state]])
-        elif self.state == 'BYPASS':
+
+        # State machine
+        if self.state == 'BYPASS':
             # Here we're interested in incoming bits (TDI).
             if cmd != 'DR TDI':
                 return