2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
5 ## Copyright (C) 2012-2013 Uwe Hermann <uwe@hermann-uwe.de>
7 ## This program is free software; you can redistribute it and/or modify
8 ## it under the terms of the GNU General Public License as published by
9 ## the Free Software Foundation; either version 2 of the License, or
10 ## (at your option) any later version.
12 ## This program is distributed in the hope that it will be useful,
13 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ## GNU General Public License for more details.
17 ## You should have received a copy of the GNU General Public License
18 ## along with this program; if not, write to the Free Software
19 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 import sigrokdecode as srd
41 - 'J', 'K', 'SE0', or 'SE1'
45 - Note: Symbols like SE0, SE1, and the J that's part of EOP don't yield 'BIT'.
48 # Low-/full-speed symbols.
49 # Note: Low-speed J and K are inverted compared to the full-speed J and K!
52 # (<dp>, <dm>): <symbol/state>
59 # (<dp>, <dm>): <symbol/state>
66 # (<dp>, <dm>): <symbol/state>
75 'low-speed': 1500000, # 1.5Mb/s (+/- 1.5%)
76 'full-speed': 12000000, # 12Mb/s (+/- 0.25%)
83 'SE0': [2, ['SE0', '0']],
84 'SE1': [3, ['SE1', '1']],
87 class SamplerateError(Exception):
90 class Decoder(srd.Decoder):
93 name = 'USB signalling'
94 longname = 'Universal Serial Bus (LS/FS) signalling'
95 desc = 'USB (low-speed and full-speed) signalling protocol.'
98 outputs = ['usb_signalling']
100 {'id': 'dp', 'name': 'D+', 'desc': 'USB D+ signal'},
101 {'id': 'dm', 'name': 'D-', 'desc': 'USB D- signal'},
104 {'id': 'signalling', 'desc': 'Signalling',
105 'default': 'automatic', 'values': ('automatic', 'full-speed', 'low-speed')},
108 ('sym-j', 'J symbol'),
109 ('sym-k', 'K symbol'),
110 ('sym-se0', 'SE0 symbol'),
111 ('sym-se1', 'SE1 symbol'),
112 ('sop', 'Start of packet (SOP)'),
113 ('eop', 'End of packet (EOP)'),
115 ('stuffbit', 'Stuff bit'),
117 ('keep-alive', 'Low-speed keep-alive'),
121 ('bits', 'Bits', (4, 5, 6, 7, 8, 9, 10)),
122 ('symbols', 'Symbols', (0, 1, 2, 3)),
126 self.samplerate = None
127 self.oldsym = 'J' # The "idle" state is J.
132 self.samplepos = None
133 self.samplenum_target = None
134 self.samplenum_edge = None
135 self.samplenum_lastedge = 0
138 self.consecutive_ones = 0
142 self.out_python = self.register(srd.OUTPUT_PYTHON)
143 self.out_ann = self.register(srd.OUTPUT_ANN)
145 def metadata(self, key, value):
146 if key == srd.SRD_CONF_SAMPLERATE:
147 self.samplerate = value
148 self.signalling = self.options['signalling']
149 if self.signalling != 'automatic':
150 self.update_bitrate()
152 def update_bitrate(self):
153 self.bitrate = bitrates[self.signalling]
154 self.bitwidth = float(self.samplerate) / float(self.bitrate)
156 def putpx(self, data):
157 s = self.samplenum_edge
158 self.put(s, s, self.out_python, data)
160 def putx(self, data):
161 s = self.samplenum_edge
162 self.put(s, s, self.out_ann, data)
164 def putpm(self, data):
165 e = self.samplenum_edge
166 self.put(self.ss_block, e, self.out_python, data)
168 def putm(self, data):
169 e = self.samplenum_edge
170 self.put(self.ss_block, e, self.out_ann, data)
172 def putpb(self, data):
173 s, e = self.samplenum_lastedge, self.samplenum_edge
174 self.put(s, e, self.out_python, data)
176 def putb(self, data):
177 s, e = self.samplenum_lastedge, self.samplenum_edge
178 self.put(s, e, self.out_ann, data)
180 def set_new_target_samplenum(self):
181 self.samplepos += self.bitwidth;
182 self.samplenum_target = int(self.samplepos)
183 self.samplenum_lastedge = self.samplenum_edge
184 self.samplenum_edge = int(self.samplepos - (self.bitwidth / 2))
186 def wait_for_sop(self, sym):
187 # Wait for a Start of Packet (SOP), i.e. a J->K symbol change.
188 if sym != 'K' or self.oldsym != 'J':
190 self.consecutive_ones = 0
191 self.update_bitrate()
192 self.samplepos = self.samplenum - (self.bitwidth / 2) + 0.5
193 self.set_new_target_samplenum()
194 self.putpx(['SOP', None])
195 self.putx([4, ['SOP', 'S']])
196 self.state = 'GET BIT'
198 def handle_bit(self, b):
199 if self.consecutive_ones == 6:
202 self.putpb(['STUFF BIT', None])
203 self.putb([7, ['Stuff bit: 0', 'SB: 0', '0']])
204 self.consecutive_ones = 0
206 self.putpb(['ERR', None])
207 self.putb([8, ['Bit stuff error', 'BS ERR', 'B']])
210 # Normal bit (not a stuff bit).
211 self.putpb(['BIT', b])
212 self.putb([6, ['%s' % b]])
214 self.consecutive_ones += 1
216 self.consecutive_ones = 0
218 def get_eop(self, sym):
219 # EOP: SE0 for >= 1 bittime (usually 2 bittimes), then J.
220 self.set_new_target_samplenum()
221 self.putpb(['SYM', sym])
222 self.putb(sym_annotation[sym])
228 self.putpm(['EOP', None])
229 self.putm([5, ['EOP', 'E']])
232 self.putpm(['ERR', None])
233 self.putm([8, ['EOP Error', 'EErr', 'E']])
236 def get_bit(self, sym):
237 self.set_new_target_samplenum()
239 # Start of an EOP. Change state, save edge
240 self.state = 'GET EOP'
241 self.ss_block = self.samplenum_lastedge
243 b = '0' if self.oldsym != sym else '1'
245 self.putpb(['SYM', sym])
246 self.putb(sym_annotation[sym])
247 if self.oldsym != sym:
248 edgesym = symbols[self.signalling][tuple(self.edgepins)]
249 if edgesym not in ('SE0', 'SE1'):
251 self.bitwidth = self.bitwidth - (0.001 * self.bitwidth)
252 self.samplepos = self.samplepos - (0.01 * self.bitwidth)
254 self.bitwidth = self.bitwidth + (0.001 * self.bitwidth)
255 self.samplepos = self.samplepos + (0.01 * self.bitwidth)
258 def handle_idle(self, sym):
259 self.samplenum_edge = self.samplenum
260 se0_length = float(self.samplenum - self.samplenum_lastedge) / self.samplerate
261 if se0_length > 2.5e-6: # 2.5us
262 self.putpb(['RESET', None])
263 self.putb([10, ['Reset', 'Res', 'R']])
264 self.signalling = self.options['signalling']
265 elif se0_length > 1.2e-6 and self.signalling == 'low-speed':
266 self.putpb(['KEEP ALIVE', None])
267 self.putb([9, ['Keep-alive', 'KA', 'A']])
270 self.signalling = 'full-speed'
271 self.update_bitrate()
273 self.signalling = 'low-speed'
274 self.update_bitrate()
278 def decode(self, ss, es, data):
279 if not self.samplerate:
280 raise SamplerateError('Cannot decode without samplerate.')
281 for (self.samplenum, pins) in data:
283 if self.state == 'IDLE':
284 # Ignore identical samples early on (for performance reasons).
285 if self.oldpins == pins:
288 sym = symbols[self.signalling][tuple(pins)]
290 self.samplenum_lastedge = self.samplenum
291 self.state = 'WAIT IDLE'
293 self.wait_for_sop(sym)
295 elif self.state in ('GET BIT', 'GET EOP'):
296 # Wait until we're in the middle of the desired bit.
297 if self.samplenum == self.samplenum_edge:
299 if self.samplenum < self.samplenum_target:
301 sym = symbols[self.signalling][tuple(pins)]
302 if self.state == 'GET BIT':
304 elif self.state == 'GET EOP':
307 elif self.state == 'WAIT IDLE':
308 if tuple(pins) == (0, 0):
310 if self.samplenum - self.samplenum_lastedge > 1:
311 sym = symbols[self.options['signalling']][tuple(pins)]
312 self.handle_idle(sym)
314 sym = symbols[self.signalling][tuple(pins)]
315 self.wait_for_sop(sym)
318 elif self.state == 'INIT':
319 sym = symbols[self.options['signalling']][tuple(pins)]
320 self.handle_idle(sym)