2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2014 Torsten Duwe <duwe@suse.de>
5 ## Copyright (C) 2014 Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
7 ## This program is free software; you can redistribute it and/or modify
8 ## it under the terms of the GNU General Public License as published by
9 ## the Free Software Foundation; either version 2 of the License, or
10 ## (at your option) any later version.
12 ## This program is distributed in the hope that it will be useful,
13 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ## GNU General Public License for more details.
17 ## You should have received a copy of the GNU General Public License
18 ## along with this program; if not, write to the Free Software
19 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 import sigrokdecode as srd
24 class Decoder(srd.Decoder):
28 longname = 'Pulse-width modulation'
29 desc = 'Analog level encoded in duty cycle percentage.'
34 {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
37 {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-high',
38 'values': ('active-low', 'active-high')},
41 ('duty-cycle', 'Duty cycle'),
47 def __init__(self, **kwargs):
48 self.ss = self.es = None
49 self.first_transition = True
50 self.first_samplenum = None
51 self.start_samplenum = None
52 self.end_samplenum = None
58 self.startedge = 0 if self.options['polarity'] == 'active-low' else 1
59 self.out_ann = self.register(srd.OUTPUT_ANN)
60 self.out_bin = self.register(srd.OUTPUT_BINARY)
62 self.register(srd.OUTPUT_META,
63 meta=(float, 'Average', 'PWM base (cycle) frequency'))
66 self.put(self.ss, self.es, self.out_ann, data)
69 self.put(self.num_cycles, self.num_cycles, self.out_bin, data)
71 def decode(self, ss, es, data):
73 for (self.samplenum, pins) in data:
74 # Ignore identical samples early on (for performance reasons).
75 if self.oldpin == pins[0]:
78 # Initialize self.oldpins with the first sample value.
79 if self.oldpin is None:
83 if self.first_transition:
85 if self.oldpin != self.startedge:
86 self.first_samplenum = self.samplenum
87 self.start_samplenum = self.samplenum
88 self.first_transition = False
90 if self.oldpin != self.startedge:
92 # We are on a full cycle we can calculate
93 # the period, the duty cycle and its ratio.
94 period = self.samplenum - self.start_samplenum
95 duty = self.end_samplenum - self.start_samplenum
96 ratio = float(duty / period)
98 # This interval starts at this edge.
99 self.ss = self.start_samplenum
100 # Store the new rising edge position and the ending
102 self.start_samplenum = self.es = self.samplenum
104 # Report the duty cycle in percent.
105 percent = float(ratio * 100)
106 self.putx([0, ["%f%%" % percent]])
108 # Report the duty cycle in the binary output.
109 self.putb((0, bytes([int(ratio * 256)])))
111 # Update and report the new duty cycle average.
113 self.average += percent
114 self.put(self.first_samplenum, self.es, self.out_average,
115 float(self.average / self.num_cycles))
118 self.end_samplenum = self.ss = self.samplenum
120 self.oldpin = pins[0]