2 ## This file is part of the sigrok project.
4 ## Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 # 1-Wire protocol decoder
23 import sigrokdecode as srd
25 # Annotation feed formats
32 class Decoder(srd.Decoder):
37 desc = '1-Wire bus and MicroLan'
42 {'id': 'owr', 'name': 'OWR', 'desc': '1-Wire bus'},
45 {'id': 'pwr', 'name': 'PWR', 'desc': '1-Wire power'},
48 'overdrive': ['Overdrive', 0],
51 ['ASCII', 'Data bytes as ASCII characters'],
52 ['Decimal', 'Databytes as decimal, integer values'],
53 ['Hex', 'Data bytes in hex format'],
54 ['Octal', 'Data bytes as octal numbers'],
55 ['Bits', 'Data bytes in bit notation (sequence of 0/1 digits)'],
58 def __init__(self, **kwargs):
61 # Link layer variables
62 self.lnk_state = 'WAIT FOR FALLING EDGE'
63 self.lnk_event = 'NONE'
69 # Network layer variables
70 self.net_mode = 'WRITE'
71 self.net_state = 'WAIT FOR COMMAND'
72 self.net_event = 'NONE'
75 # Transport layer variables
76 self.trn_state = 'WAIT FOR EVENT'
77 self.trn_event = 'NONE'
79 def start(self, metadata):
80 self.samplerate = metadata['samplerate']
81 self.out_proto = self.add(srd.OUTPUT_PROTO, 'onewire')
82 self.out_ann = self.add(srd.OUTPUT_ANN , 'onewire')
84 # The width of the 1-Wire time base (30us) in number of samples.
85 # TODO: optimize this value
86 self.time_base = float(self.samplerate) * float(0.000030)
87 print ("DEBUG: samplerate = %d, time_base = %d" % (self.samplerate, self.time_base))
92 def decode(self, ss, es, data):
93 for (self.samplenum, (owr, pwr)) in data:
94 # print ("DEBUG: sample = %d, owr = %d, pwr = %d, lnk_fall = %d, lnk_state = %s" % (self.samplenum, owr, pwr, self.lnk_fall, self.lnk_state))
99 self.lnk_event = "NONE"
101 if self.lnk_state == 'WAIT FOR FALLING EDGE':
102 # The start of a cycle is a falling edge.
104 # Save the sample number for the falling edge.
105 self.lnk_fall = self.samplenum
106 # Go to waiting for sample time
107 self.lnk_state = 'WAIT FOR DATA SAMPLE'
108 self.put(self.lnk_fall, self.samplenum, self.out_ann,
109 [ANN_DEC, ['LNK: NEGEDGE: ']])
110 elif self.lnk_state == 'WAIT FOR DATA SAMPLE':
111 # Data should be sample one 'time unit' after a falling edge
112 if (self.samplenum - self.lnk_fall == 1*self.time_base):
113 self.lnk_bit = owr & 0x1
114 self.lnk_event = "DATA BIT"
115 if (self.lnk_bit) : self.lnk_state = 'WAIT FOR FALLING EDGE'
116 else : self.lnk_state = 'WAIT FOR RISING EDGE'
117 self.put(self.lnk_fall, self.samplenum, self.out_ann,
118 [ANN_DEC, ['LNK: BIT: ' + str(self.lnk_bit)]])
119 elif self.lnk_state == 'WAIT FOR RISING EDGE':
120 # The end of a cycle is a rising edge.
122 # A reset cycle is longer than 8T.
123 if (self.samplenum - self.lnk_fall > 8*self.time_base):
124 # Save the sample number for the falling edge.
125 self.lnk_rise = self.samplenum
126 # Send a reset event to the next protocol layer.
127 self.lnk_event = "RESET"
128 self.lnk_state = "WAIT FOR PRESENCE DETECT"
129 self.put(self.lnk_fall, self.samplenum, self.out_proto,
131 self.put(self.lnk_fall, self.samplenum, self.out_ann,
132 [ANN_DEC, ['LNK: RESET: ']])
133 print ("DEBUG: RESET t0=%d t+=%d" % (self.lnk_fall, self.samplenum))
135 self.lnk_fall = self.samplenum
136 # Otherwise this is assumed to be a data bit.
138 self.lnk_state = "WAIT FOR FALLING EDGE"
139 elif self.lnk_state == 'WAIT FOR PRESENCE DETECT':
140 # Data should be sample one 'time unit' after a falling edge
141 if (self.samplenum - self.lnk_rise == 2.5*self.time_base):
142 self.lnk_present = owr & 0x1
143 # Save the sample number for the falling edge.
144 if not (self.lnk_present) : self.lnk_fall = self.samplenum
145 # create presence detect event
146 #self.lnk_event = "PRESENCE DETECT"
147 if (self.lnk_present) : self.lnk_state = 'WAIT FOR FALLING EDGE'
148 else : self.lnk_state = 'WAIT FOR RISING EDGE'
149 self.put(self.lnk_fall, self.samplenum, self.out_ann,
150 [ANN_DEC, ['LNK: PRESENCE: ' + str(self.lnk_present)]])
151 print ("DEBUG: PRESENCE=%d t0=%d t+=%d" % (self.lnk_present, self.lnk_fall, self.samplenum))
153 raise Exception('Invalid lnk_state: %d' % self.lnk_state)
155 # Link layer (byte sized units)
158 if (self.lnk_event == "RESET"):
161 elif (self.lnk_event == "DATA BIT"):
162 if (self.net_mode in ["WRITE", "READ"]):
163 self.lnk_cnt = self.lnk_cnt + 1
164 self.lnk_byte = (self.lnk_byte << 1) | self.lnk_bit
165 if (self.lnk_cnt == 8):
166 print ("DEBUG: BYTE=0x%02x t0=%d t+=%d" % (self.lnk_byte, self.lnk_fall, self.samplenum))
167 self.lnk_event = "DATA BYTE"
170 elif (self.net_mode == "SEARCH"):
171 self.lnk_cnt = self.lnk_cnt + 1
172 self.lnk_byte = (self.lnk_byte << 1) | self.lnk_bit
173 if (self.lnk_cnt == 8):
174 print ("DEBUG: BYTE=0x%02x t0=%d t+=%d" % (self.lnk_byte, self.lnk_fall, self.samplenum))
175 self.lnk_event = "DATA BYTE"
179 raise Exception('Invalid net_mode: %s' % self.net_mode)
180 elif not (self.lnk_event == "NONE"):
181 raise Exception('Invalid lnk_event: %s' % self.lnk_event)
186 self.net_event = "RESET"
188 if (self.lnk_event == "RESET"):
189 self.net_state = "WAIT FOR COMMAND"
191 elif (self.lnk_event == "DATA BIT"):
193 elif (self.lnk_event == "DATA BYTE"):
194 if (self.net_state == "WAIT FOR COMMAND"):
195 self.net_cmd = self.lnk_byte
196 # self.put(self.lnk_fall, self.samplenum,
197 # self.out_proto, ['LNK: COMMAND', self.net_cmd])
198 self.put(self.lnk_fall, self.samplenum, self.out_ann,
199 [ANN_DEC, ['LNK: COMMAND: 0x' + hex(self.net_cmd)]])
200 print ("DEBUG: CMD=0x%02x t0=%d t+=%d" % (self.net_cmd, self.lnk_fall, self.samplenum))
201 if (self.net_cmd == 0x33):
204 elif (self.net_cmd == 0x0f):
207 elif (self.net_cmd == 0xcc):
210 elif (self.net_cmd == 0x55):
213 elif (self.net_cmd == 0xf0):
216 elif (self.net_cmd == 0x3c):
219 elif (self.net_cmd == 0x69):
220 # OVERDRIVE MATCH ROM
223 elif (self.net_state == "WAIT FOR ROM"):
227 raise Exception('Invalid net_state: %d' % self.net_state)
228 elif not (self.lnk_event == "NONE"):
229 raise Exception('Invalid lnk_event: %s' % self.lnk_event)
232 # if (self.samplenum == self.lnk_start + 8*self.time_base):
233 # self.put(self.lnk_fall, self.samplenum - 1, self.out_proto, ['RESET'])